Scott Long 80d8d9f8d1 gpu: nvgpu: MISRA 10.1 fixes to gr ...

MISRA Rule 10.1 states that operands shall not be of an inappopriate
essential type.  For example, shift and bitwise operations should only
be performed on operands of essentially unsigned type.

This patch modifies gr exception handling to no longer use bitwise OR
when generating return status values.

Instead, the first non-zero status value is saved off and returned.

This has the added benefit of not potentially ORing together errno
values and generating an undefined status code.

JIRA NVGPU-650

Change-Id: If725a560c122d2cbf12e79b58161402da2023b5b
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1999098
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

2019-01-22 13:14:29 -08:00

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