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ee66559a0b
All channels in a TSG need to share same engine context i.e. pointer in RAMFC of all channels in a TSG must point to same NV_RAMIN_GR_WFI_TARGET To get this, add a pointer to gr_ctx inside TSG struct so that TSG can maintain its own unique gr_ctx Also, change the type of gr_ctx in a channel to pointer variable so that if channel is part of TSG it can point to TSG's gr_ctx otherwise it will point to its own gr_ctx In gk20a_alloc_obj_ctx(), allocate gr_ctx as below : 1) If channel is not part of any TSG - allocate its own gr_ctx buffer if it is already not allocated 2) If channel is part of TSG - Check if TSG has already allocated gr_ctx (as part of TSG) - If yes, channel's gr_ctx will point to that of TSG's - If not, then it means channels is first to be bounded to this TSG - And in this case we will allocate new gr_ctx on TSG first and then make channel's gr_ctx to point to this gr_ctx Also, gr_ctx will be released as below ; 1) If channels is not part of TSG, then it will be released when channels is closed 2) Otherwise, it will be released when TSG itself is closed Bug 1470692 Change-Id: Id347217d5b462e0e972cd3d79d17795b37034a50 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/417065 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
49 lines
1.5 KiB
C
49 lines
1.5 KiB
C
/*
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* Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __TSG_GK20A_H_
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#define __TSG_GK20A_H_
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#define NVGPU_INVALID_TSG_ID (-1)
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bool gk20a_is_channel_marked_as_tsg(struct channel_gk20a *ch);
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int gk20a_tsg_dev_release(struct inode *inode, struct file *filp);
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int gk20a_tsg_dev_open(struct inode *inode, struct file *filp);
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long gk20a_tsg_dev_ioctl(struct file *filp,
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unsigned int cmd, unsigned long arg);
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int gk20a_init_tsg_support(struct gk20a *g, u32 tsgid);
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int gk20a_bind_runnable_channel_to_tsg(struct channel_gk20a *ch, int tsgid);
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int gk20a_unbind_channel_from_tsg(struct channel_gk20a *ch, int tsgid);
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struct tsg_gk20a {
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struct gk20a *g;
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bool in_use;
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int tsgid;
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struct list_head ch_runnable_list;
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int num_runnable_channels;
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struct mutex ch_list_lock;
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struct gr_ctx_desc *tsg_gr_ctx;
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struct vm_gk20a *vm;
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};
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#endif /* __TSG_GK20A_H_ */
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