osi_core: macsec: Reorg MACSec code for DOS-SHR-10437

Reorganize MACSec source code to accommodate N1Auto MACSec HW IP OSI
driver.

Separated MACSec hardware-specific code into a different static lib

Bug 4874880

Change-Id: I74e4cca8ba615def283ec938cc94985d32099190
Signed-off-by: Sanath Kumar Gampa <sgampa@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/3214907
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Mahesh Patil <maheshp@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>

include/osi_macsec.h

@@ -405,6 +405,58 @@ struct osi_macsec_dbg_buf_config {
 };
 #endif
 
+/**
+ * @brief MACSEC core operations structure
+ */
+struct osi_macsec_core_ops {
+	/** macsec init */
+	nve32_t (*init)(struct osi_core_priv_data *const osi_core,
+			nveu32_t mtu, nveu8_t *const mac_addr);
+	/** macsec de-init */
+	nve32_t (*deinit)(struct osi_core_priv_data *const osi_core);
+	/** Macsec irq handler */
+	void (*handle_irq)(struct osi_core_priv_data *const osi_core);
+	/** macsec lut config */
+	nve32_t (*lut_config)(struct osi_core_priv_data *const osi_core,
+			struct osi_macsec_lut_config *const lut_config);
+#ifdef MACSEC_KEY_PROGRAM
+	/** macsec kt config */
+	nve32_t (*kt_config)(struct osi_core_priv_data *const osi_core,
+			struct osi_macsec_kt_config *const kt_config);
+#endif /* MACSEC_KEY_PROGRAM */
+	/** macsec cipher config */
+	nve32_t (*cipher_config)(struct osi_core_priv_data *const osi_core,
+			nveu32_t cipher);
+#ifdef DEBUG_MACSEC
+	/** macsec loopback config */
+	nve32_t (*loopback_config)(struct osi_core_priv_data *const osi_core,
+			nveu32_t enable);
+#endif /* DEBUG_MACSEC */
+	/** macsec config SA in HW LUT */
+	nve32_t (*config)(struct osi_core_priv_data *const osi_core,
+			struct osi_macsec_sc_info *const sc,
+			nveu32_t enable, nveu16_t ctlr, nveu16_t *kt_idx);
+	/** macsec read mmc counters */
+	void (*read_mmc)(struct osi_core_priv_data *const osi_core);
+#ifdef DEBUG_MACSEC
+	/** macsec debug buffer config */
+	nve32_t (*dbg_buf_config)(struct osi_core_priv_data *const osi_core,
+			struct osi_macsec_dbg_buf_config *const dbg_buf_config);
+	/** macsec debug buffer config */
+	nve32_t (*dbg_events_config)(struct osi_core_priv_data *const osi_core,
+			struct osi_macsec_dbg_buf_config *const dbg_buf_config);
+#endif /* DEBUG_MACSEC */
+	/** macsec get Key Index start for a given SCI */
+	nve32_t (*get_sc_lut_key_index)(struct osi_core_priv_data *const osi_core,
+			nveu8_t *sci, nveu32_t *key_index, nveu16_t ctlr);
+	/** macsec set MTU size */
+	nve32_t (*update_mtu)(struct osi_core_priv_data *const osi_core, nveu32_t mtu);
+#ifdef DEBUG_MACSEC
+	/** macsec interrupts configuration */
+	void (*intr_config)(struct osi_core_priv_data *const osi_core, nveu32_t enable);
+#endif /* DEBUG_MACSEC */
+};
+
 //////////////////////////////////////////////////////////////////////////
 	/* MACSEC OSI interface API prototypes */
 //////////////////////////////////////////////////////////////////////////
@@ -916,5 +968,7 @@ nve32_t osi_macsec_get_sc_lut_key_index(
 		struct osi_core_priv_data *const osi_core,
 		nveu8_t *sci, nveu32_t *key_index, nveu16_t ctlr);
 
+void macsec_init_ops(void *macsecops);
+
 #endif /* MACSEC_SUPPORT */
 #endif /* INCLUDED_OSI_MACSEC_H */

osi/core/Makefile.tmk

@@ -1,6 +1,6 @@
 ################################### tell Emacs this is a -*- makefile-gmake -*-
 #
-# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved.
+# Copyright (c) 2019-2024, NVIDIA CORPORATION. All rights reserved.
 #
 # Permission is hereby granted, free of charge, to any person obtaining a
 # copy of this software and associated documentation files (the "Software"),
@@ -40,11 +40,14 @@ NV_COMPONENT_SOURCES           := \
 	$(NV_SOURCE)/nvethernetrm/osi/core/xpcs.c \
 	$(NV_SOURCE)/nvethernetrm/osi/core/mgbe_mmc.c \
 	$(NV_SOURCE)/nvethernetrm/osi/core/core_common.c \
-	$(NV_SOURCE)/nvethernetrm/osi/core/macsec.c
+	$(NV_SOURCE)/nvethernetrm/osi/core/common_macsec.c
 
 NV_COMPONENT_INCLUDES          := \
 	$(NV_SOURCE)/nvethernetrm/include \
 
+NV_COMPONENT_NEEDED_STATIC_INTERFACE_DIRS += \
+	$(NV_SOURCE)/nvethernetrm/osi/nvmacsecrm
+
 ifeq ($(EN_OSI_RM_FTRACE),1)
 # Enable below for function trace logs
 #NV_COMPONENT_CFLAGS            += -DOSI_RM_FTRACE

osi/core/common_macsec.c

@@ -0,0 +1,640 @@
+// SPDX-License-Identifier: LicenseRef-NvidiaProprietary
+/* SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifdef MACSEC_SUPPORT
+#include <osi_macsec.h>
+#include "common.h"
+#include "eqos_core.h"
+#include "core_local.h"
+
+/**
+ * @brief osi_init_macsec_ops - macsec initialize operations
+ *
+ * @note
+ * Algorithm:
+ *  - If virtualization is enabled initialize virt ops
+ *  - Else
+ *    - If macsec base is null return -1
+ *    - initialize with macsec ops
+ *  - Refer to MACSEC column of <<******, (sequence diagram)>> for API details.
+ *  - TraceID: ***********
+ *
+ * @param[in] osi_core: OSI core private data structure. used param macsec_base
+ *
+ * @pre MACSEC needs to be out of reset and proper clock configured.
+ *
+ * @note
+ * API Group:
+ * - Initialization: No
+ * - Run time: Yes
+ * - De-initialization: No
+ *
+ * @retval 0 on success
+ * @retval -1 on failure
+ */
+nve32_t osi_init_macsec_ops(struct osi_core_priv_data *const osi_core)
+{
+	static struct osi_macsec_core_ops virt_macsec_ops;
+	nve32_t ret = 0;
+	struct core_local *l_core = (struct core_local *)(void *)osi_core;
+	static struct osi_macsec_core_ops macsec_ops = {0};
+
+	if (osi_core == OSI_NULL) {
+		ret = -1;
+		goto exit;
+	}
+
+	if (osi_core->use_virtualization == OSI_ENABLE) {
+#ifdef OSI_RM_FTRACE
+		ethernet_server_entry_log();
+#endif
+		l_core->macsec_ops = &virt_macsec_ops;
+		ivc_init_macsec_ops(l_core->macsec_ops);
+#ifdef OSI_RM_FTRACE
+		ethernet_server_exit_log();
+#endif
+	} else {
+		if (osi_core->macsec_base == OSI_NULL) {
+			ret = -1;
+			goto exit;
+		}
+		l_core->macsec_ops = &macsec_ops;
+		macsec_init_ops(l_core->macsec_ops);
+	}
+exit:
+	return ret;
+}
+
+/**
+ * @brief osi_macsec_init - Initialize the macsec controller
+ *
+ * @note
+ * Algorithm:
+ *  - Return -1 if osi core or ops is null
+ *  - Configure MTU, controller configs, interrupts, clear all LUT's and
+ *    set BYP LUT entries for MKPDU and BC packets
+ *  - Refer to MACSEC column of <<******, (sequence diagram)>> for API details.
+ *  - TraceID: ***********
+ *
+ * @param[in] osi_core: OSI core private data structure.
+ * @param[in] mtu: mtu to be programmed
+ * @param[in] macsec_vf_mac: Pointer to VF MACID
+ *
+ * @pre MACSEC needs to be out of reset and proper clock configured.
+ *
+ * @note
+ * API Group:
+ * - Initialization: No
+ * - Run time: Yes
+ * - De-initialization: No
+ *
+ * @retval 0 on success
+ * @retval -1 on failure
+ */
+nve32_t osi_macsec_init(struct osi_core_priv_data *const osi_core,
+			nveu32_t mtu, nveu8_t *const macsec_vf_mac)
+{
+	nve32_t ret = -1;
+	const struct core_local *l_core = (struct core_local *)(void *)osi_core;
+	void *mac_addr = OSI_NULL;
+	nveu32_t value = 0;
+
+	if ((osi_core != OSI_NULL) && (l_core->macsec_ops != OSI_NULL) &&
+	    (l_core->macsec_ops->init != OSI_NULL) &&
+	    (macsec_vf_mac != OSI_NULL)) {
+		mac_addr = osi_core->base;
+#ifdef OSI_RM_FTRACE
+		ethernet_server_entry_log();
+#endif
+		if (osi_core->use_virtualization != OSI_ENABLE) {
+			/* Update MAC value as per macsec requirement */
+			l_core->ops_p->macsec_config_mac(osi_core, OSI_ENABLE);
+			if (osi_core->mac_ver == OSI_EQOS_MAC_5_40) {
+				value = osi_readla(osi_core, (nveu8_t *)mac_addr + EQOS_MAC_MCR);
+				/* Disable MAC Transmit as per suggestion in bug 4456073 */
+				value &= ~EQOS_MCR_TE;
+				osi_writela(osi_core, value, (nveu8_t *)mac_addr + EQOS_MAC_MCR);
+			}
+		}
+		ret = l_core->macsec_ops->init(osi_core, mtu, macsec_vf_mac);
+		if (osi_core->use_virtualization != OSI_ENABLE) {
+			if (osi_core->mac_ver == OSI_EQOS_MAC_5_40) {
+				value = osi_readla(osi_core, (nveu8_t *)mac_addr + EQOS_MAC_MCR);
+				/* Enable MAC Transmit as per suggestion in bug 4456073 */
+				value |= EQOS_MCR_TE;
+				osi_writela(osi_core, value, (nveu8_t *)mac_addr + EQOS_MAC_MCR);
+			}
+		}
+
+#ifdef OSI_RM_FTRACE
+		ethernet_server_exit_log();
+#endif
+	}
+
+	return ret;
+}
+
+/**
+ * @brief osi_macsec_deinit - De-Initialize the macsec controller
+ *
+ * @note
+ * Algorithm:
+ *  - Return -1 if osi core or ops is null
+ *  - Resets macsec global data structured and restores the mac confirguration
+ *  - Refer to MACSEC column of <<******, (sequence diagram)>> for API details.
+ *  - TraceID: ***********
+ *
+ * @param[in] osi_core: OSI core private data structure
+ *
+ * @pre MACSEC needs to be out of reset and proper clock configured.
+ *
+ * @note
+ * API Group:
+ * - Initialization: No
+ * - Run time: Yes
+ * - De-initialization: No
+ *
+ * @retval 0 on success
+ * @retval -1 on failure
+ */
+nve32_t osi_macsec_deinit(struct osi_core_priv_data *const osi_core)
+{
+	nve32_t ret = -1;
+	const struct core_local *l_core = (struct core_local *)(void *)osi_core;
+
+	if ((osi_core != OSI_NULL) && (l_core->macsec_ops != OSI_NULL) &&
+	    (l_core->macsec_ops->deinit != OSI_NULL)) {
+#ifdef OSI_RM_FTRACE
+		ethernet_server_entry_log();
+#endif
+		ret = l_core->macsec_ops->deinit(osi_core);
+		if (osi_core->use_virtualization != OSI_ENABLE) {
+			/* Update MAC value as per macsec requirement */
+			l_core->ops_p->macsec_config_mac(osi_core, OSI_DISABLE);
+		}
+#ifdef OSI_RM_FTRACE
+		ethernet_server_exit_log();
+#endif
+	}
+	return ret;
+}
+
+/**
+ * @brief osi_macsec_isr - macsec irq handler
+ *
+ * @note
+ * Algorithm:
+ *  - Return -1 if osi core or ops is null
+ *  - handles macsec interrupts
+ *  - Refer to MACSEC column of <<******, (sequence diagram)>> for API details.
+ *  - TraceID: ***********
+ *
+ * @param[in] osi_core: OSI core private data structure
+ *
+ * @pre MACSEC needs to be out of reset and proper clock configured.
+ *
+ * @note
+ * API Group:
+ * - Initialization: No
+ * - Run time: Yes
+ * - De-initialization: No
+ */
+void osi_macsec_isr(struct osi_core_priv_data *const osi_core)
+{
+	const struct core_local *l_core = (struct core_local *)(void *)osi_core;
+
+	if ((osi_core != OSI_NULL) && (l_core->macsec_ops != OSI_NULL) &&
+	    (l_core->macsec_ops->handle_irq != OSI_NULL)) {
+#ifdef OSI_RM_FTRACE
+		ethernet_server_entry_log();
+#endif
+		l_core->macsec_ops->handle_irq(osi_core);
+#ifdef OSI_RM_FTRACE
+		ethernet_server_exit_log();
+#endif
+	}
+}
+
+/**
+ * @brief osi_macsec_config_lut - Read or write to macsec LUTs
+ *
+ * @note
+ * Algorithm:
+ *  - Return -1 if osi core or ops is null
+ *  - Reads or writes to MACSEC LUTs
+ *  - Refer to MACSEC column of <<******, (sequence diagram)>> for API details.
+ *  - TraceID: ***********
+ *
+ * @param[in] osi_core: OSI core private data structure
+ * @param[out] lut_config: Pointer to the lut configuration
+ *
+ * @pre MACSEC needs to be out of reset and proper clock configured.
+ *
+ * @note
+ * API Group:
+ * - Initialization: No
+ * - Run time: Yes
+ * - De-initialization: No
+ *
+ * @retval 0 on success
+ * @retval -1 on failure
+ */
+nve32_t osi_macsec_config_lut(struct osi_core_priv_data *const osi_core,
+			  struct osi_macsec_lut_config *const lut_config)
+{
+	nve32_t ret = -1;
+	const struct core_local *l_core = (struct core_local *)(void *)osi_core;
+
+	if ((osi_core != OSI_NULL) && (l_core->macsec_ops != OSI_NULL) &&
+	    (l_core->macsec_ops->lut_config != OSI_NULL) &&
+	    (lut_config != OSI_NULL)) {
+#ifdef OSI_RM_FTRACE
+		ethernet_server_entry_log();
+#endif
+		ret = l_core->macsec_ops->lut_config(osi_core, lut_config);
+#ifdef OSI_RM_FTRACE
+		ethernet_server_exit_log();
+#endif
+	}
+
+	return ret;
+}
+
+/**
+ * @brief osi_macsec_get_sc_lut_key_index - API to get key index for a given SCI
+ *
+ * @note
+ * Algorithm:
+ *  - Return -1 if osi core or ops is null
+ *  - gets the key index for the given sci
+ *  - Refer to MACSEC column of <<******, (sequence diagram)>> for API details.
+ *  - TraceID: ***********
+ *
+ * @param[in] osi_core: OSI core private data structure
+ * @param[in] sci: Pointer to sci that needs to be found
+ * @param[out] key_index: Pointer to key_index
+ * @param[in] ctlr: macsec controller selected
+ *
+ * @pre MACSEC needs to be out of reset and proper clock configured.
+ *
+ * @note
+ * API Group:
+ * - Initialization: No
+ * - Run time: Yes
+ * - De-initialization: No
+ *
+ * @retval 0 on success
+ * @retval -1 on failure
+ */
+nve32_t osi_macsec_get_sc_lut_key_index(struct osi_core_priv_data *const osi_core,
+					nveu8_t *sci, nveu32_t *key_index,
+					nveu16_t ctlr)
+{
+	nve32_t ret = -1;
+	const struct core_local *l_core = (struct core_local *)(void *)osi_core;
+
+	if ((osi_core != OSI_NULL) && (l_core->macsec_ops != OSI_NULL) &&
+	    (l_core->macsec_ops->get_sc_lut_key_index != OSI_NULL) &&
+	    (sci != OSI_NULL) && (key_index != OSI_NULL) && (ctlr <= OSI_CTLR_SEL_MAX)) {
+#ifdef OSI_RM_FTRACE
+		ethernet_server_entry_log();
+#endif
+		ret = l_core->macsec_ops->get_sc_lut_key_index(osi_core, sci, key_index,
+								  ctlr);
+#ifdef OSI_RM_FTRACE
+		ethernet_server_exit_log();
+#endif
+	}
+
+	return ret;
+}
+
+#ifdef MACSEC_KEY_PROGRAM
+/**
+ * @brief osi_macsec_config_kt - API to read or update the keys
+ *
+ * @note
+ * Algorithm:
+ *  - Return -1 if osi core or ops is null
+ *  - Read or write the keys
+ *  - Refer to MACSEC column of <<******, (sequence diagram)>> for API details.
+ *  - TraceID: ***********
+ *
+ * @param[in] osi_core: OSI core private data structure
+ * @param[in] kt_config: Keys that needs to be programmed
+ *
+ * @pre MACSEC needs to be out of reset and proper clock configured.
+ *
+ * @note
+ * API Group:
+ * - Initialization: No
+ * - Run time: Yes
+ * - De-initialization: No
+ *
+ * @retval 0 on success
+ * @retval -1 on failure
+ */
+nve32_t osi_macsec_config_kt(struct osi_core_priv_data *const osi_core,
+			 struct osi_macsec_kt_config *const kt_config)
+{
+	nve32_t ret = -1;
+	const struct core_local *l_core = (struct core_local *)(void *)osi_core;
+
+	if ((osi_core != OSI_NULL) && (l_core->macsec_ops != OSI_NULL) &&
+	    (l_core->macsec_ops->kt_config != OSI_NULL) &&
+	    (kt_config != OSI_NULL)) {
+		ret = l_core->macsec_ops->kt_config(osi_core, kt_config);
+	}
+
+	return ret;
+}
+#endif /* MACSEC_KEY_PROGRAM */
+
+/**
+ * @brief osi_macsec_cipher_config - API to update the cipher
+ *
+ * @note
+ * Algorithm:
+ *  - Return -1 if osi core or ops is null
+ *  - Updates cipher to use
+ *  - Refer to MACSEC column of <<******, (sequence diagram)>> for API details.
+ *  - TraceID: ***********
+ *
+ * @param[in] osi_core: OSI core private data structure
+ * @param[in] cipher: Cipher suit to be used
+ *
+ * @pre MACSEC needs to be out of reset and proper clock configured.
+ *
+ * @note
+ * API Group:
+ * - Initialization: No
+ * - Run time: Yes
+ * - De-initialization: No
+ *
+ * @retval 0 on success
+ * @retval -1 on failure
+ */
+nve32_t osi_macsec_cipher_config(struct osi_core_priv_data *const osi_core,
+			      nveu32_t cipher)
+{
+	nve32_t ret = -1;
+	const struct core_local *l_core = (struct core_local *)(void *)osi_core;
+
+	if ((osi_core != OSI_NULL) && (l_core->macsec_ops != OSI_NULL) &&
+	    (l_core->macsec_ops->cipher_config != OSI_NULL)) {
+#ifdef OSI_RM_FTRACE
+		ethernet_server_entry_log();
+#endif
+		ret = l_core->macsec_ops->cipher_config(osi_core, cipher);
+#ifdef OSI_RM_FTRACE
+		ethernet_server_exit_log();
+#endif
+	}
+
+	return ret;
+}
+
+#ifdef DEBUG_MACSEC
+/**
+ * @brief osi_macsec_loopback - API to enable/disable macsec loopback
+ *
+ * @note
+ * Algorithm:
+ *  - Return -1 if osi core or ops is null
+ *  - Enables/disables macsec loopback
+ *  - Refer to MACSEC column of <<******, (sequence diagram)>> for API details.
+ *  - TraceID: ***********
+ *
+ * @param[in] osi_core: OSI core private data structure
+ * @param[in] enable: parameter to enable or disable
+ *
+ * @pre MACSEC needs to be out of reset and proper clock configured.
+ *
+ * @note
+ * API Group:
+ * - Initialization: No
+ * - Run time: Yes
+ * - De-initialization: No
+ *
+ * @retval 0 on success
+ * @retval -1 on failure
+ */
+nve32_t osi_macsec_loopback(struct osi_core_priv_data *const osi_core,
+			nveu32_t enable)
+{
+	nve32_t ret = -1;
+	const struct core_local *l_core = (struct core_local *)(void *)osi_core;
+
+	if ((osi_core != OSI_NULL) && (l_core->macsec_ops != OSI_NULL) &&
+	    (l_core->macsec_ops->loopback_config != OSI_NULL)) {
+		ret = l_core->macsec_ops->loopback_config(osi_core, enable);
+	}
+
+	return ret;
+}
+#endif /* DEBUG_MACSEC */
+
+/**
+ * @brief osi_macsec_config - Updates SC or SA in the macsec
+ *
+ * @note
+ * Algorithm:
+ *  - Return -1 if passed params are invalid
+ *  - Return -1 if osi core or ops is null
+ *  - Update/add/delete SC/SA
+ *  - Refer to MACSEC column of <<******, (sequence diagram)>> for API details.
+ *  - TraceID: ***********
+ *
+ * @param[in] osi_core: OSI core private data structure
+ * @param[in] sc: Pointer to the sc that needs to be added/deleted/updated
+ * @param[in] enable: enable or disable
+ * @param[in] ctlr: Controller selected
+ * @param[out] kt_idx: Pointer to the kt_index passed to OSD
+ *
+ * @pre MACSEC needs to be out of reset and proper clock configured.
+ *
+ * @note
+ * API Group:
+ * - Initialization: No
+ * - Run time: Yes
+ * - De-initialization: No
+ *
+ * @retval 0 on success
+ * @retval -1 on failure
+ */
+nve32_t osi_macsec_config(struct osi_core_priv_data *const osi_core,
+		      struct osi_macsec_sc_info *const sc,
+		      nveu32_t enable, nveu16_t ctlr,
+		      nveu16_t *kt_idx)
+{
+	nve32_t ret = -1;
+	const struct core_local *l_core = (struct core_local *)(void *)osi_core;
+
+	if (((enable != OSI_ENABLE) && (enable != OSI_DISABLE)) ||
+	    (ctlr > OSI_CTLR_SEL_MAX) || (kt_idx == OSI_NULL)) {
+		goto exit;
+	}
+
+	if ((osi_core != OSI_NULL) && (l_core->macsec_ops != OSI_NULL) &&
+	    (l_core->macsec_ops->config != OSI_NULL) && (sc != OSI_NULL)) {
+#ifdef OSI_RM_FTRACE
+		ethernet_server_entry_log();
+#endif
+		ret = l_core->macsec_ops->config(osi_core, sc,
+						    enable, ctlr, kt_idx);
+#ifdef OSI_RM_FTRACE
+		ethernet_server_exit_log();
+#endif
+	}
+exit:
+	return ret;
+}
+
+/**
+ * @brief osi_macsec_read_mmc - Updates the mmc counters
+ *
+ * @note
+ * Algorithm:
+ *  - Return -1 if osi core or ops is null
+ *  - Updates the mcc counters in osi_core structure
+ *  - Refer to MACSEC column of <<******, (sequence diagram)>> for API details.
+ *  - TraceID: ***********
+ *
+ * @param[out] osi_core: OSI core private data structure
+ *
+ * @pre MACSEC needs to be out of reset and proper clock configured.
+ *
+ * @note
+ * API Group:
+ * - Initialization: No
+ * - Run time: Yes
+ * - De-initialization: No
+ *
+ * @retval 0 on success
+ * @retval -1 on failure
+ */
+nve32_t osi_macsec_read_mmc(struct osi_core_priv_data *const osi_core)
+{
+	nve32_t ret = -1;
+	const struct core_local *l_core = (struct core_local *)(void *)osi_core;
+
+	if ((osi_core != OSI_NULL) && (l_core->macsec_ops != OSI_NULL) &&
+	    (l_core->macsec_ops->read_mmc != OSI_NULL)) {
+#ifdef OSI_RM_FTRACE
+		ethernet_server_entry_log();
+#endif
+		l_core->macsec_ops->read_mmc(osi_core);
+		ret = 0;
+#ifdef OSI_RM_FTRACE
+		ethernet_server_exit_log();
+#endif
+	}
+	return ret;
+}
+
+#ifdef DEBUG_MACSEC
+/**
+ * @brief osi_macsec_config_dbg_buf - Reads the debug buffer captured
+ *
+ * @note
+ * Algorithm:
+ *  - Return -1 if osi core or ops is null
+ *  - Reads the dbg buffers captured
+ *  - Refer to MACSEC column of <<******, (sequence diagram)>> for API details.
+ *  - TraceID: ***********
+ *
+ * @param[in] osi_core: OSI core private data structure
+ * @param[out] dbg_buf_config: dbg buffer data captured
+ *
+ * @pre MACSEC needs to be out of reset and proper clock configured.
+ *
+ * @note
+ * API Group:
+ * - Initialization: No
+ * - Run time: Yes
+ * - De-initialization: No
+ *
+ * @retval 0 on success
+ * @retval -1 on failure
+ */
+nve32_t osi_macsec_config_dbg_buf(
+		struct osi_core_priv_data *const osi_core,
+		struct osi_macsec_dbg_buf_config *const dbg_buf_config)
+{
+	nve32_t ret = -1;
+	const struct core_local *l_core = (struct core_local *)(void *)osi_core;
+
+	if ((osi_core != OSI_NULL) && (l_core->macsec_ops != OSI_NULL) &&
+	    (l_core->macsec_ops->dbg_buf_config != OSI_NULL) &&
+	    (dbg_buf_config != OSI_NULL) &&
+	    (osi_core->macsec != OSI_MACSEC_T26X)) {
+		ret = l_core->macsec_ops->dbg_buf_config(osi_core,
+							dbg_buf_config);
+	}
+
+	return ret;
+}
+
+/**
+ * @brief osi_macsec_dbg_events_config - Enables debug buffer events
+ *
+ * @note
+ * Algorithm:
+ *  - Return -1 if osi core or ops is null
+ *  - Enables specific events to capture debug buffers
+ *  - Refer to MACSEC column of <<******, (sequence diagram)>> for API details.
+ *  - TraceID: ***********
+ *
+ * @param[in] osi_core: OSI core private data structure
+ * @param[in] dbg_buf_config: dbg buffer data captured
+ *
+ * @pre MACSEC needs to be out of reset and proper clock configured.
+ *
+ * @note
+ * API Group:
+ * - Initialization: No
+ * - Run time: Yes
+ * - De-initialization: No
+ *
+ * @retval 0 on success
+ * @retval -1 on failure
+ */
+nve32_t osi_macsec_dbg_events_config(
+		struct osi_core_priv_data *const osi_core,
+		struct osi_macsec_dbg_buf_config *const dbg_buf_config)
+{
+	nve32_t ret = -1;
+	const struct core_local *l_core = (struct core_local *)(void *)osi_core;
+
+	if ((osi_core != OSI_NULL) && (l_core->macsec_ops != OSI_NULL) &&
+	    (l_core->macsec_ops->dbg_events_config != OSI_NULL) &&
+	    (dbg_buf_config != OSI_NULL) &&
+	    (osi_core->macsec != OSI_MACSEC_T26X)) {
+		ret = l_core->macsec_ops->dbg_events_config(osi_core,
+							dbg_buf_config);
+	}
+
+	return ret;
+}
+
+#endif /* DEBUG_MACSEC */
+#endif /* MACSEC_SUPPORT */

osi/core/core_common.c

@@ -25,7 +25,6 @@
 #include "mgbe_core.h"
 #include "eqos_core.h"
 #include "xpcs.h"
-#include "macsec.h"
 #include "osi_macsec.h"
 
 nve32_t poll_check(struct osi_core_priv_data *const osi_core, nveu8_t *addr,

osi/core/core_local.h

@@ -346,61 +346,6 @@ struct dynamic_cfg {
 	struct core_l2 l2[EQOS_MAX_MAC_ADDRESS_FILTER];
 };
 
-#ifdef MACSEC_SUPPORT
-/**
- * @brief MACSEC core operations structure
- */
-struct osi_macsec_core_ops {
-	/** macsec init */
-	nve32_t (*init)(struct osi_core_priv_data *const osi_core,
-			nveu32_t mtu, nveu8_t *const mac_addr);
-	/** macsec de-init */
-	nve32_t (*deinit)(struct osi_core_priv_data *const osi_core);
-	/** Macsec irq handler */
-	void (*handle_irq)(struct osi_core_priv_data *const osi_core);
-	/** macsec lut config */
-	nve32_t (*lut_config)(struct osi_core_priv_data *const osi_core,
-			struct osi_macsec_lut_config *const lut_config);
-#ifdef MACSEC_KEY_PROGRAM
-	/** macsec kt config */
-	nve32_t (*kt_config)(struct osi_core_priv_data *const osi_core,
-			struct osi_macsec_kt_config *const kt_config);
-#endif /* MACSEC_KEY_PROGRAM */
-	/** macsec cipher config */
-	nve32_t (*cipher_config)(struct osi_core_priv_data *const osi_core,
-			nveu32_t cipher);
-#ifdef DEBUG_MACSEC
-	/** macsec loopback config */
-	nve32_t (*loopback_config)(struct osi_core_priv_data *const osi_core,
-			nveu32_t enable);
-#endif /* DEBUG_MACSEC */
-	/** macsec config SA in HW LUT */
-	nve32_t (*config)(struct osi_core_priv_data *const osi_core,
-			struct osi_macsec_sc_info *const sc,
-			nveu32_t enable, nveu16_t ctlr, nveu16_t *kt_idx);
-	/** macsec read mmc counters */
-	void (*read_mmc)(struct osi_core_priv_data *const osi_core);
-#ifdef DEBUG_MACSEC
-	/** macsec debug buffer config */
-	nve32_t (*dbg_buf_config)(struct osi_core_priv_data *const osi_core,
-			struct osi_macsec_dbg_buf_config *const dbg_buf_config);
-	/** macsec debug buffer config */
-	nve32_t (*dbg_events_config)(struct osi_core_priv_data *const osi_core,
-			struct osi_macsec_dbg_buf_config *const dbg_buf_config);
-#endif /* DEBUG_MACSEC */
-	/** macsec get Key Index start for a given SCI */
-	nve32_t (*get_sc_lut_key_index)(struct osi_core_priv_data *const osi_core,
-			nveu8_t *sci, nveu32_t *key_index, nveu16_t ctlr);
-	/** macsec set MTU size */
-	nve32_t (*update_mtu)(struct osi_core_priv_data *const osi_core, nveu32_t mtu);
-#ifdef DEBUG_MACSEC
-	/** macsec interrupts configuration */
-	void (*intr_config)(struct osi_core_priv_data *const osi_core, nveu32_t enable);
-#endif /* DEBUG_MACSEC */
-};
-
-#endif /* MACSEC_SUPPORT */
-
 /**
  * @brief Core local data structure.
  */

osi/core/eqos_core.c

@@ -26,7 +26,6 @@
 #include "eqos_mmc.h"
 #include "core_local.h"
 #include "core_common.h"
-#include "macsec.h"
 #include "xpcs.h"
 
 /*

osi/core/ivc_core.c

@@ -28,7 +28,6 @@
 #include "eqos_mmc.h"
 #include "core_local.h"
 #include "common.h"
-#include "macsec.h"
 
 /**
  * @brief ivc_handle_ioctl - marshell input argument to handle runtime command

osi/core/mgbe_core.c

@@ -28,7 +28,6 @@
 #include "xpcs.h"
 #include "mgbe_mmc.h"
 #include "core_common.h"
-#include "macsec.h"
 
 /**
  * @brief mgbe_poll_for_mac_accrtl - Poll for Indirect Access control and status

osi/core/rules.mk

@@ -1,6 +1,6 @@
 ###################################
 #
-# Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved.
+# Copyright (c) 2023-2024, NVIDIA CORPORATION. All rights reserved.
 #
 # Permission is hereby granted, free of charge, to any person obtaining a
 # copy of this software and associated documentation files (the "Software"),
@@ -40,6 +40,7 @@ GLOBAL_INCLUDES += \
 	$(NVETHERNETRM)/osi/common/include/ \
 	$(NVETHERNETRM)/osi/core/ \
 	$(NVETHERNETRM)/osi/dma/ \
+	$(NVETHERNETRM)/osi/nvmacsecrm/ \
 	$(TEGRA_TOP)/fsi-internal/fw/include \
 
 MODULE_SRCS += \
@@ -54,7 +55,7 @@ MODULE_SRCS += \
 	$(NVETHERNETRM)/osi/core/xpcs.c \
 	$(NVETHERNETRM)/osi/core/mgbe_mmc.c \
 	$(NVETHERNETRM)/osi/core/mgbe_core.c \
-	$(NVETHERNETRM)/osi/core/macsec.c \
+	$(NVETHERNETRM)/osi/core/common_macsec.c \
 	$(NVETHERNETRM)/osi/core/debug.c
 
 MODULE_COMPILEFLAGS += -Wno-format

osi/nvmacsecrm/Makefile.interface.tmk

@@ -0,0 +1,38 @@
+################################### tell Emacs this is a -*- makefile-gmake -*-
+#
+# Copyright (c) 2024, NVIDIA CORPORATION. All rights reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a
+# copy of this software and associated documentation files (the "Software"),
+# to deal in the Software without restriction, including without limitation
+# the rights to use, copy, modify, merge, publish, distribute, sublicense,
+# and/or sell copies of the Software, and to permit persons to whom the
+# Software is furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+# DEALINGS IN THE SOFTWARE.
+#
+# libnvethernetcl interface makefile fragment
+#
+###############################################################################
+
+ifdef NV_INTERFACE_FLAG_STATIC_LIBRARY_SECTION
+NV_INTERFACE_NAME           := nvmacsecrm
+NV_INTERFACE_COMPONENT_DIR := .
+NV_INTERFACE_PUBLIC_INCLUDES := \
+	./include
+endif
+
+# Local Variables:
+# indent-tabs-mode: t
+# tab-width: 8
+# End:
+# vi: set tabstop=8 noexpandtab:

osi/nvmacsecrm/Makefile.tmk

@@ -0,0 +1,47 @@
+################################### tell Emacs this is a -*- makefile-gmake -*-
+#
+# Copyright (c) 2024, NVIDIA CORPORATION. All rights reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a
+# copy of this software and associated documentation files (the "Software"),
+# to deal in the Software without restriction, including without limitation
+# the rights to use, copy, modify, merge, publish, distribute, sublicense,
+# and/or sell copies of the Software, and to permit persons to whom the
+# Software is furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+# DEALINGS IN THE SOFTWARE.
+#
+###############################################################################
+
+ifdef NV_COMPONENT_FLAG_STATIC_LIBRARY_SECTION
+include $(NV_BUILD_START_COMPONENT)
+
+NV_COMPONENT_STRICT_WARNINGS_qnx_64 := 1
+
+NV_COMPONENT_NAME              := nvmacsecrm
+NV_COMPONENT_OWN_INTERFACE_DIR := .
+NV_COMPONENT_SOURCES           := \
+	$(NV_SOURCE)/nvethernetrm/osi/nvmacsecrm/macsec.c
+
+NV_COMPONENT_INCLUDES          := \
+	$(NV_SOURCE)/nvethernetrm/include
+
+include $(NV_SOURCE)/nvethernetrm/include/config.tmk
+
+include $(NV_BUILD_STATIC_LIBRARY)
+endif
+
+# Local Variables:
+# indent-tabs-mode: t
+# tab-width: 8
+# End:
+# vi: set tabstop=8 noexpandtab:

osi/nvmacsecrm/libnvmacsecrm.export

@@ -0,0 +1,26 @@
+################################### tell Emacs this is a -*- makefile-gmake -*-
+#
+# Copyright (c) 2024, NVIDIA CORPORATION. All rights reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a
+# copy of this software and associated documentation files (the "Software"),
+# to deal in the Software without restriction, including without limitation
+# the rights to use, copy, modify, merge, publish, distribute, sublicense,
+# and/or sell copies of the Software, and to permit persons to whom the
+# Software is furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+# DEALINGS IN THE SOFTWARE.
+#
+# libnvmacsecrm interface export
+#
+###############################################################################
+macsec_init_ops

osi/nvmacsecrm/macsec.h

@@ -537,4 +537,164 @@
 #define MACSEC_COMMON_ISR_SET_T26X	0xD06cU
 #endif
 
+/**
+ * @addtogroup Generic helper MACROS
+ *
+ * @brief These are Generic helper macros used at various places.
+ * @{
+ */
+#define RETRY_COUNT     1000U
+#define COND_MET        0
+#define COND_NOT_MET    1
+#define RETRY_DELAY     1U
+/** @} */
+
+/**
+ * @brief osi_macsec_readla - Read a memory mapped register.
+ *
+ * @ note
+ * The difference between osi_macsec_readla & osi_readl is osi_core argument.
+ * In case of ethernet server, osi_core used to define policy for each VM.
+ * In case of non virtualization osi_core argument is ignored.
+ *
+ * @param[in] priv: Priv address.
+ * @param[in] addr: Memory mapped address.
+ *
+ * @note Physical address has to be memmory mapped.
+ *
+ * @return Data from memory mapped register - success.
+ */
+static inline nveu32_t osi_macsec_readla(OSI_UNUSED void *priv, void *addr)
+{
+	(void)priv;
+	return *(volatile nveu32_t *)addr;
+}
+
+/**
+ *
+ * @ note
+ * @brief osi_macsec_writela - Write to a memory mapped register.
+ * The difference between osi_macsec_writela & osi_writel is osi_core argument.
+ * In case of ethernet server, osi_core used to define policy for each VM.
+ * In case of non virtualization osi_core argument is ignored.
+ *
+ * @param[in] priv: Priv address.
+ * @param[in] val:  Value to be written.
+ * @param[in] addr: Memory mapped address.
+ *
+ * @note Physical address has to be memmory mapped.
+ */
+static inline void osi_macsec_writela(OSI_UNUSED void *priv, nveu32_t val, void *addr)
+{
+	(void)priv;
+	*(volatile nveu32_t *)addr = val;
+}
+
+static nveu64_t osi_macsec_update_stats_counter(nveu64_t last_value, nveu64_t incr)
+{
+	return ((last_value & (nveu64_t)OSI_LLONG_MAX) + (incr & (nveu64_t)OSI_LLONG_MAX));
+}
+
+/**
+ * @brief osi_macsec_lock_irq_enabled - Spin lock. Busy loop till lock is acquired.
+ *
+ * @note
+ * Algorithm:
+ *  - Atomic compare and swap operation till lock is held.
+ *
+ * @param[in] lock - Pointer to lock to be acquired.
+ *
+ * @note
+ *  - Does not disable irq. Do not call this API to acquire any
+ *    lock that is shared between top/bottom half. It will result in deadlock.
+ *
+ * @note
+ * API Group:
+ * - Initialization: No
+ * - Run time: Yes
+ * - De-initialization: No
+ */
+static inline void osi_macsec_lock_irq_enabled(nveu32_t *lock)
+{
+	/* __sync_val_compare_and_swap(lock, old value, new value) returns the
+	 * old value if successful.
+	 */
+	while (__sync_val_compare_and_swap(lock, OSI_UNLOCKED, OSI_LOCKED) !=
+	       OSI_UNLOCKED) {
+		 /* Spinning.
+		  * Will deadlock if any ISR tried to lock again.
+		  */
+	}
+}
+
+/**
+ * @brief osi_macsec_unlock_irq_enabled - Release lock.
+ *
+ * @note
+ * Algorithm:
+ *  - Atomic compare and swap operation to release lock.
+ *
+ * @param[in] lock - Pointer to lock to be released.
+ *
+ * @note
+ *  - Does not disable irq. Do not call this API to release any
+ *    lock that is shared between top/bottom half.
+ *
+ * @note
+ * API Group:
+ * - Initialization: No
+ * - Run time: Yes
+ * - De-initialization: No
+ */
+static inline void osi_macsec_unlock_irq_enabled(nveu32_t *lock)
+{
+	if (__sync_val_compare_and_swap(lock, OSI_LOCKED, OSI_UNLOCKED) !=
+	    OSI_LOCKED) {
+		/* Do nothing. Already unlocked */
+	}
+}
+
+static inline void osi_macsec_memset(void *s, nveu8_t c, nveu64_t count)
+{
+	nveu8_t *xs = (nveu8_t *)s;
+	nveu64_t i = 0UL;
+
+	for (i = 0UL; i < count; i++) {
+		xs[i] = c;
+	}
+}
+
+static inline void osi_macsec_memcpy(void *dest, const void *src, nveu64_t n)
+{
+	nve8_t *cdest = dest;
+	const nve8_t *csrc = src;
+	nveu64_t i = 0;
+
+	for (i = 0; i < n; i++) {
+		cdest[i] = csrc[i];
+	}
+}
+
+static inline nve32_t osi_macsec_memcmp(const void *dest, const void *src, nve32_t n)
+{
+	const nve8_t *const cdest = dest;
+	const nve8_t *const csrc = src;
+	nve32_t ret = 0;
+	nve32_t i;
+
+	for (i = 0; i < n; i++) {
+		if (csrc[i] < cdest[i]) {
+			ret = -1;
+			goto fail;
+		} else if (csrc[i] > cdest[i]) {
+			ret = 1;
+			goto fail;
+		} else {
+			/* Do Nothing */
+		}
+	}
+fail:
+	return ret;
+}
+
 #endif /* INCLUDED_MACSEC_H */