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git://nv-tegra.nvidia.com/kernel/nvethernetrm.git
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osi: core: Update ethernet stats to VF osi core
Issue: When the ethernet server got enabled, OSI core stats are not getting updated to VF's. Fix: Add IOCTL to copy OSI core stats into VF's OSI core structure. Bug 3763499 Change-Id: Ib0a957ff90805b7e716d8f5994e0a65d63660c1e Signed-off-by: Mohan Thadikamalla <mohant@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2808680 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -35,14 +35,6 @@
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*/
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#define MAX_ARGS 10
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/*
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*@brief All Stats
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*/
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struct osi_stats {
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struct osi_mmc_counters mmc_s;
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struct osi_tsn_stats tsn_s;
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};
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/**
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* @brief IVC commands between OSD & OSI.
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*/
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@@ -151,13 +143,13 @@ typedef struct ivc_msg_common {
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/** OSI HW features */
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struct osi_hw_features hw_feat;
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/** MMC counters */
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struct osi_mmc_counters mmc;
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struct osi_mmc_counters mmc_s;
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/** OSI stats counters */
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struct osi_stats stats_s;
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/** core argument structure */
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ivc_core_args init_args;
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/** ioctl command structure */
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struct osi_ioctl ioctl_data;
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/** All stats */
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struct osi_stats eth_stats;
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#ifdef MACSEC_SUPPORT
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/** lut config */
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struct osi_macsec_lut_config lut_config;
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@@ -26,42 +26,6 @@
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#include <nvethernet_type.h>
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#include "osi_common.h"
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#ifndef OSI_STRIPPED_LIB
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/**
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* @brief osi_xtra_stat_counters - OSI core extra stat counters
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*/
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struct osi_xtra_stat_counters {
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/** RX buffer unavailable irq count */
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nveu64_t rx_buf_unavail_irq_n[OSI_MGBE_MAX_NUM_QUEUES];
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/** Transmit Process Stopped irq count */
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nveu64_t tx_proc_stopped_irq_n[OSI_MGBE_MAX_NUM_QUEUES];
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/** Transmit Buffer Unavailable irq count */
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nveu64_t tx_buf_unavail_irq_n[OSI_MGBE_MAX_NUM_QUEUES];
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/** Receive Process Stopped irq count */
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nveu64_t rx_proc_stopped_irq_n[OSI_MGBE_MAX_NUM_QUEUES];
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/** Receive Watchdog Timeout irq count */
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nveu64_t rx_watchdog_irq_n;
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/** Fatal Bus Error irq count */
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nveu64_t fatal_bus_error_irq_n;
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/** rx skb allocation failure count */
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nveu64_t re_alloc_rxbuf_failed[OSI_MGBE_MAX_NUM_QUEUES];
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/** TX per channel interrupt count */
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nveu64_t tx_normal_irq_n[OSI_MGBE_MAX_NUM_QUEUES];
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/** TX per channel SW timer callback count */
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nveu64_t tx_usecs_swtimer_n[OSI_MGBE_MAX_NUM_QUEUES];
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/** RX per channel interrupt count */
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nveu64_t rx_normal_irq_n[OSI_MGBE_MAX_NUM_QUEUES];
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/** link connect count */
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nveu64_t link_connect_count;
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/** link disconnect count */
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nveu64_t link_disconnect_count;
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/** lock fail count node addition */
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nveu64_t ts_lock_add_fail;
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/** lock fail count node removal */
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nveu64_t ts_lock_del_fail;
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};
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#endif /* !OSI_STRIPPED_LIB */
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#ifdef MACSEC_SUPPORT
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/**
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* @brief The structure hold macsec statistics counters
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@@ -56,6 +56,9 @@
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#define OSI_MTL_QUEUE_AVB 0x1U
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#define OSI_MTL_QUEUE_ENABLE 0x2U
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#define OSI_MTL_QUEUE_MODEMAX 0x3U
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#ifndef OSI_STRIPPED_LIB
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#define OSI_MTL_MAX_NUM_QUEUES 10U
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#endif
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/** @} */
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/**
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@@ -181,9 +184,9 @@ struct osi_fpe_config {
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};
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/**
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* @brief OSI Core TSN error stats structure
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* @brief OSI Core error stats structure
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*/
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struct osi_tsn_stats {
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struct osi_stats {
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/** Constant Gate Control Error */
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nveu64_t const_gate_ctr_err;
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/** Head-Of-Line Blocking due to Scheduling */
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@@ -198,6 +201,32 @@ struct osi_tsn_stats {
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nveu64_t base_time_reg_err;
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/** Switch to Software Owned List Complete */
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nveu64_t sw_own_list_complete;
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#ifndef OSI_STRIPPED_LIB
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/** IP Header Error */
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nveu64_t mgbe_ip_header_err;
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/** Jabber time out Error */
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nveu64_t mgbe_jabber_timeout_err;
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/** Payload Checksum Error */
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nveu64_t mgbe_payload_cs_err;
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/** Under Flow Error */
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nveu64_t mgbe_tx_underflow_err;
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/** RX buffer unavailable irq count */
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nveu64_t rx_buf_unavail_irq_n[OSI_MTL_MAX_NUM_QUEUES];
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/** Transmit Process Stopped irq count */
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nveu64_t tx_proc_stopped_irq_n[OSI_MTL_MAX_NUM_QUEUES];
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/** Transmit Buffer Unavailable irq count */
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nveu64_t tx_buf_unavail_irq_n[OSI_MTL_MAX_NUM_QUEUES];
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/** Receive Process Stopped irq count */
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nveu64_t rx_proc_stopped_irq_n[OSI_MTL_MAX_NUM_QUEUES];
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/** Receive Watchdog Timeout irq count */
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nveu64_t rx_watchdog_irq_n;
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/** Fatal Bus Error irq count */
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nveu64_t fatal_bus_error_irq_n;
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/** lock fail count node addition */
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nveu64_t ts_lock_add_fail;
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/** lock fail count node removal */
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nveu64_t ts_lock_del_fail;
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#endif
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};
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/**
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@@ -276,6 +276,7 @@ typedef my_lint_64 nvel64_t;
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#ifdef HSI_SUPPORT
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#define OSI_CMD_HSI_INJECT_ERR 55U
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#endif
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#define OSI_CMD_READ_STATS 56U
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/** @} */
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/**
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@@ -1216,22 +1217,6 @@ struct core_padctrl {
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nveu32_t pad_calibration_enable;
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};
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#ifndef OSI_STRIPPED_LIB
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/**
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* @brief OSI CORE packet error stats
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*/
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struct osi_core_pkt_err_stats {
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/** IP Header Error */
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nveu64_t mgbe_ip_header_err;
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/** Jabber time out Error */
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nveu64_t mgbe_jabber_timeout_err;
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/** Payload Checksum Error */
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nveu64_t mgbe_payload_cs_err;
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/** Under Flow Error */
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nveu64_t mgbe_tx_underflow_err;
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};
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#endif
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#ifdef HSI_SUPPORT
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/**
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* @brief The OSI Core HSI private data structure.
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@@ -1352,8 +1337,6 @@ struct osi_core_priv_data {
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/** TQ:TC mapping */
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nveu32_t tc[OSI_MGBE_MAX_NUM_CHANS];
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#ifndef OSI_STRIPPED_LIB
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/** xtra sw error counters */
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struct osi_xtra_stat_counters xstats;
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/** Memory mapped base address of HV window */
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void *hv_base;
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/** csr clock is to program LPI 1 us tick timer register.
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@@ -1382,8 +1365,8 @@ struct osi_core_priv_data {
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* 1- Successful and can be used between P2P device
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*/
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nveu32_t fpe_ready;
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/** TSN stats counters */
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struct osi_tsn_stats tsn_stats;
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/** MAC stats counters */
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struct osi_stats stats;
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/** eqos pad control structure */
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struct core_padctrl padctrl;
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/** MDC clock rate */
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@@ -1409,10 +1392,6 @@ struct osi_core_priv_data {
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nveu32_t phy_iface_mode;
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/** MGBE MAC instance ID's */
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nveu32_t instance_id;
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#ifndef OSI_STRIPPED_LIB
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/** Packet error stats */
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struct osi_core_pkt_err_stats pkt_err_stats;
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#endif
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/** Ethernet controller MAC to MAC Time sync role
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* 1 - Primary interface, 2 - secondary interface, 0 - inactive interface
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*/
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