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core: eqos: Program OVHD value for EQOS
As per guidelines form HW team, add recommended OVHD for eqos Bug 200765943 Change-Id: Ic885ed9681869fd6f13c65407d208f9e30e19e5e Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2589995 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -2001,6 +2001,14 @@ static void eqos_tsn_init(struct osi_core_priv_data *osi_core,
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osi_writela(osi_core, val, (nveu8_t *)osi_core->base +
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osi_writela(osi_core, val, (nveu8_t *)osi_core->base +
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EQOS_MTL_EST_CONTROL);
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EQOS_MTL_EST_CONTROL);
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val = osi_readla(osi_core, (nveu8_t *)osi_core->base +
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EQOS_MTL_EST_OVERHEAD);
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val &= ~EQOS_MTL_EST_OVERHEAD_OVHD;
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/* As per hardware team recommendation */
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val |= EQOS_MTL_EST_OVERHEAD_RECOMMEND;
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osi_writela(osi_core, val, (nveu8_t *)osi_core->base +
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EQOS_MTL_EST_OVERHEAD);
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eqos_enable_mtl_interrupts(osi_core);
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eqos_enable_mtl_interrupts(osi_core);
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}
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}
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@@ -145,6 +145,7 @@
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#define EQOS_MTL_RXQ_DMA_MAP0 0x0C30
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#define EQOS_MTL_RXQ_DMA_MAP0 0x0C30
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#define EQOS_MTL_RXQ_DMA_MAP1 0x0C34
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#define EQOS_MTL_RXQ_DMA_MAP1 0x0C34
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#define EQOS_MTL_EST_CONTROL 0x0C50
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#define EQOS_MTL_EST_CONTROL 0x0C50
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#define EQOS_MTL_EST_OVERHEAD 0x0C54
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#define EQOS_MTL_EST_STATUS 0x0C58
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#define EQOS_MTL_EST_STATUS 0x0C58
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#define EQOS_MTL_EST_SCH_ERR 0x0C60
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#define EQOS_MTL_EST_SCH_ERR 0x0C60
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#define EQOS_MTL_EST_FRMS_ERR 0x0C64
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#define EQOS_MTL_EST_FRMS_ERR 0x0C64
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@@ -538,6 +539,10 @@
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#define EQOS_MTL_EST_CONTROL_DDBF OSI_BIT(4)
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#define EQOS_MTL_EST_CONTROL_DDBF OSI_BIT(4)
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#define EQOS_MTL_EST_CONTROL_SSWL OSI_BIT(1)
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#define EQOS_MTL_EST_CONTROL_SSWL OSI_BIT(1)
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#define EQOS_MTL_EST_CONTROL_EEST OSI_BIT(0)
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#define EQOS_MTL_EST_CONTROL_EEST OSI_BIT(0)
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#define EQOS_MTL_EST_OVERHEAD_OVHD (OSI_BIT(5) | OSI_BIT(4) | \
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OSI_BIT(3) | OSI_BIT(2) | \
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OSI_BIT(1) | OSI_BIT(0))
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#define EQOS_MTL_EST_OVERHEAD_RECOMMEND 0x17U
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/* EST GCL controlOSI_BITmap */
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/* EST GCL controlOSI_BITmap */
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#define EQOS_MTL_EST_ADDR_SHIFT 8U
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#define EQOS_MTL_EST_ADDR_SHIFT 8U
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#define EQOS_MTL_EST_ADDR_MASK (OSI_BIT(8) | OSI_BIT(9) | \
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#define EQOS_MTL_EST_ADDR_MASK (OSI_BIT(8) | OSI_BIT(9) | \
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