core: eqos: handling onestep ipv4 flags

Issue: OSI_MAC_TCR_CSC not handled in
eqos code

Fix: update time control register with
CSC bit if passed form upper layer.

Bug 200764256

Change-Id: Ifbfab0de4bb81625c4bd023fad67131ee6a43987
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2593818
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Mohan Thadikamalla <mohant@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: Mohan Thadikamalla <mohant@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Rakesh Goyal
2021-09-14 09:02:35 +05:30
committed by mobile promotions
parent 3af55e0c58
commit 6c53499842

View File

@@ -4207,6 +4207,9 @@ static void eqos_config_tscr(struct osi_core_priv_data *const osi_core,
case OSI_MAC_TCR_TSENALL: case OSI_MAC_TCR_TSENALL:
mac_tcr |= OSI_MAC_TCR_TSENALL; mac_tcr |= OSI_MAC_TCR_TSENALL;
break; break;
case OSI_MAC_TCR_CSC:
mac_tcr |= OSI_MAC_TCR_CSC;
break;
default: default:
/* To avoid MISRA violation */ /* To avoid MISRA violation */
mac_tcr |= mac_tcr; mac_tcr |= mac_tcr;