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osi: core: add SW error code for XPCS write failure

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As return specific error code on PCS read-after-write fails.
And add SW error code to report for FSI on failure.

Bug 3792855

Change-Id: I51b8a088247d98621750af7bb42100a078c083c2
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2781195
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Om Prakash Singh
2022-09-23 07:31:30 +05:30
committed by Bhadram Varka
parent fd4d10d4ad
commit 6ebced1c84
3 changed files with 9 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
include/osi_core.h
View File

@@ -347,6 +347,8 @@ typedef my_lint_64 nvel64_t;
#define OSI_FRP_MATCH_VLAN 9U
/** @} */
#define XPCS_WRITE_FAIL_CODE -9
#ifdef HSI_SUPPORT
/**
* @addtogroup hsi_err_code_idx
@@ -362,6 +364,7 @@ typedef my_lint_64 nvel64_t;
#define TX_FRAME_ERR_IDX 3U
#define RX_CSUM_ERR_IDX 4U
#define AUTONEG_ERR_IDX 5U
#define XPCS_WRITE_FAIL_IDX 6U
#define MACSEC_RX_CRC_ERR_IDX 0U
#define MACSEC_TX_CRC_ERR_IDX 1U
@@ -392,7 +395,7 @@ extern nveu16_t hsi_reporter_id[];
* @brief Maximum number of different mac error code
* HSI_SW_ERR_CODE + Two (Corrected and Uncorrected error code)
*/
#define HSI_MAX_MAC_ERROR_CODE 6U
#define HSI_MAX_MAC_ERROR_CODE 7U
/**
* @brief Maximum number of different macsec error code
@@ -413,6 +416,7 @@ extern nveu16_t hsi_reporter_id[];
#define OSI_MACSEC_TX_CRC_ERR 0x1006U
#define OSI_MACSEC_RX_ICV_ERR 0x1007U
#define OSI_MACSEC_REG_VIOL_ERR 0x1008U
#define OSI_XPCS_WRITE_FAIL_ERR 0x1009U
/** @} */
#endif

4
osi/core/core_common.c
View File

@@ -183,8 +183,8 @@ nve32_t hw_set_speed(struct osi_core_priv_data *const osi_core, const nve32_t sp
osi_writela(osi_core, value, ((nveu8_t *)osi_core->base + mac_mcr[osi_core->mac]));
if (osi_core->mac == OSI_MAC_HW_MGBE) {
if (xpcs_init(osi_core) < 0) {
ret = -1;
ret = xpcs_init(osi_core);
if (ret < 0) {
goto fail;
}

4
osi/core/xpcs.h
View File

@@ -171,7 +171,7 @@ static inline void xpcs_write(void *xpcs_base, nveu32_t reg_addr,
* @param[in] val: write value to register address
*
* @retval 0 on success
* @retval -1 on failure.
* @retval XPCS_WRITE_FAIL_CODE on failure
*
*/
static inline nve32_t xpcs_write_safety(struct osi_core_priv_data *osi_core,
@@ -193,6 +193,6 @@ static inline nve32_t xpcs_write_safety(struct osi_core_priv_data *osi_core,
OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
"xpcs_write_safety failed", reg_addr);
return -1;
return XPCS_WRITE_FAIL_CODE;
}
#endif