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osi: dma: compile out not required code for Safety QNX

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Bug 200770328

Change-Id: I8ee51c89954b47ceff5e261b6a2d8cc6b3f16f36
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2735897
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Bhadram Varka
2022-07-12 07:06:19 +05:30
parent cbe8715399
commit 8efbe2f864
12 changed files with 175 additions and 102 deletions
Download Patch File Download Diff File Expand all files Collapse all files

32
include/osi_dma.h
View File

@@ -252,6 +252,7 @@
*/
#define OSI_TX_MAX_BUFF_SIZE 0x3FFFU
#ifndef OSI_STRIPPED_LIB
/**
* @brief OSI packet error stats
*/
@@ -295,6 +296,7 @@ struct osi_pkt_err_stats {
/** FRP Incomplete Parsing */
unsigned long frp_incomplete;
};
#endif /* !OSI_STRIPPED_LIB */
/**
* @brief Receive Descriptor
@@ -333,16 +335,18 @@ struct osi_rx_pkt_cx {
nveu32_t flags;
/** Stores the Rx csum */
nveu32_t rxcsum;
/** Stores the VLAN tag ID in received packet */
nveu32_t vlan_tag;
/** Length of received packet */
nveu32_t pkt_len;
/** TS in nsec for the received packet */
nveul64_t ns;
#ifndef OSI_STRIPPED_LIB
/** Stores the VLAN tag ID in received packet */
nveu32_t vlan_tag;
/** Stores received packet hash */
nveu32_t rx_hash;
/** Store type of packet for which hash carries at rx_hash */
nveu32_t rx_hash_type;
/** TS in nsec for the received packet */
nveul64_t ns;
#endif /* !OSI_STRIPPED_LIB */
};
/**
@@ -374,9 +378,11 @@ struct osi_tx_swcx {
void *buf_virt_addr;
/** Length of buffer */
nveu32_t len;
#ifndef OSI_STRIPPED_LIB
/** Flag to keep track of whether buffer pointed by buf_phy_addr
* is a paged buffer/linear buffer */
nveu32_t is_paged_buf;
#endif /* !OSI_STRIPPED_LIB */
/** Flag to keep track of SWCX
* Bit 0 is_paged_buf - whether buffer pointed by buf_phy_addr
* is a paged buffer/linear buffer
@@ -456,10 +462,12 @@ struct osi_tx_ring {
nveu32_t cur_tx_idx;
/** Descriptor index for descriptor cleanup */
nveu32_t clean_idx;
#ifndef OSI_STRIPPED_LIB
/** Slot function check */
nveu32_t slot_check;
/** Slot number */
nveu32_t slot_number;
#endif /* !OSI_STRIPPED_LIB */
/** Transmit packet context */
struct osi_tx_pkt_cx tx_pkt_cx;
/** Transmit complete packet context information */
@@ -468,6 +476,7 @@ struct osi_tx_ring {
nveu32_t frame_cnt;
};
#ifndef OSI_STRIPPED_LIB
/**
* @brief osi_xtra_dma_stat_counters - OSI DMA extra stats counters
*/
@@ -489,6 +498,7 @@ struct osi_xtra_dma_stat_counters {
/** Total number of TSO packet count */
nveu64_t tx_tso_pkt_n;
};
#endif /* !OSI_STRIPPED_LIB */
struct osi_dma_priv_data;
@@ -522,6 +532,7 @@ struct osd_dma_ops {
#endif /* OSI_DEBUG */
};
#ifdef OSI_DEBUG
/**
* @brief The OSI DMA IOCTL data structure.
*/
@@ -531,6 +542,7 @@ struct osi_dma_ioctl_data {
/** IOCTL command argument */
nveu32_t arg_u32;
};
#endif /* OSI_DEBUG */
/**
* @brief The OSI DMA private data structure.
@@ -554,10 +566,12 @@ struct osi_dma_priv_data {
nveu32_t rx_buf_len;
/** MTU size */
nveu32_t mtu;
#ifndef OSI_STRIPPED_LIB
/** Packet error stats */
struct osi_pkt_err_stats pkt_err_stats;
/** Extra DMA stats */
struct osi_xtra_dma_stat_counters dstats;
#endif /* !OSI_STRIPPED_LIB */
/** Receive Interrupt Watchdog Timer Count Units */
nveu32_t rx_riwt;
/** Flag which decides riwt is enabled(1) or disabled(0) */
@@ -574,18 +588,20 @@ struct osi_dma_priv_data {
nveu32_t tx_frames;
/** Flag which decides tx_frames is enabled(1) or disabled(0) */
nveu32_t use_tx_frames;
/** DMA callback ops structure */
struct osd_dma_ops osd_ops;
#ifndef OSI_STRIPPED_LIB
/** Flag which decides virtualization is enabled(1) or disabled(0) */
nveu32_t use_virtualization;
/** Array of DMA channel slot snterval value from DT */
nveu32_t slot_interval[OSI_MGBE_MAX_NUM_CHANS];
/** Array of DMA channel slot enabled status from DT*/
nveu32_t slot_enabled[OSI_MGBE_MAX_NUM_CHANS];
/** DMA callback ops structure */
struct osd_dma_ops osd_ops;
/** Virtual address of reserved DMA buffer */
void *resv_buf_virt_addr;
/** Physical address of reserved DMA buffer */
nveu64_t resv_buf_phy_addr;
#endif /* !OSI_STRIPPED_LIB */
/** PTP flags
* OSI_PTP_SYNC_MASTER - acting as master
* OSI_PTP_SYNC_SLAVE - acting as slave
@@ -593,9 +609,9 @@ struct osi_dma_priv_data {
* OSI_PTP_SYNC_TWOSTEP - two step mode
*/
unsigned int ptp_flag;
#ifdef OSI_DEBUG
/** OSI DMA IOCTL data */
struct osi_dma_ioctl_data ioctl_data;
#ifdef OSI_DEBUG
/** Flag to enable/disable descriptor dump */
nveu32_t enable_desc_dump;
#endif /* OSI_DEBUG */
@@ -1086,6 +1102,7 @@ nveu32_t osi_is_mac_enabled(struct osi_dma_priv_data *const osi_dma);
nve32_t osi_handle_dma_intr(struct osi_dma_priv_data *osi_dma,
nveu32_t chan, nveu32_t tx_rx, nveu32_t en_dis);
#ifdef OSI_DEBUG
/**
* @brief osi_dma_ioctl - OSI DMA IOCTL
*
@@ -1102,6 +1119,7 @@ nve32_t osi_handle_dma_intr(struct osi_dma_priv_data *osi_dma,
* @retval -1 on failure.
*/
nve32_t osi_dma_ioctl(struct osi_dma_priv_data *osi_dma);
#endif /* OSI_DEBUG */
#ifndef OSI_STRIPPED_LIB
/**
* @brief osi_clear_tx_pkt_err_stats - Clear tx packet error stats.

4
include/osi_dma_txrx.h
View File

@@ -49,9 +49,11 @@
#define INCR_TX_DESC_INDEX(idx, x) ((idx) = ((idx) + (1U)) & ((x) - 1U))
/** Increment the rx descriptor index */
#define INCR_RX_DESC_INDEX(idx, x) ((idx) = ((idx) + (1U)) & ((x) - 1U))
#ifndef OSI_STRIPPED_LIB
#ifdef OSI_DEBUG
/** Decrement the tx descriptor index */
#define DECR_TX_DESC_INDEX(idx, x) ((idx) = ((idx) - (1U)) & ((x) - 1U))
#endif /* OSI_DEBUG */
#ifndef OSI_STRIPPED_LIB
/** Decrement the rx descriptor index */
#define DECR_RX_DESC_INDEX(idx, x) ((idx) = ((idx) - (1U)) & ((x) - 1U))
#endif /* !OSI_STRIPPED_LIB */

4
osi/dma/Makefile.interface.tmk
View File

@@ -26,7 +26,11 @@
ifdef NV_INTERFACE_FLAG_SHARED_LIBRARY_SECTION
NV_INTERFACE_NAME := nvethernetcl
ifeq ($(NV_BUILD_CONFIGURATION_IS_SAFETY), 0)
NV_INTERFACE_EXPORTS := lib$(NV_INTERFACE_NAME)
else
NV_INTERFACE_EXPORTS := lib$(NV_INTERFACE_NAME)_safety
endif
NV_INTERFACE_PUBLIC_INCLUDES := \
./include
endif

3
osi/dma/Makefile.tmk
View File

@@ -47,9 +47,10 @@ NV_COMPONENT_INCLUDES := \
ifeq ($(NV_BUILD_CONFIGURATION_IS_SAFETY),0)
NV_COMPONENT_CFLAGS += -DOSI_DEBUG
else
NV_COMPONENT_CFLAGS += -DOSI_STRIPPED_LIB
endif
include $(NV_BUILD_SHARED_LIBRARY)
endif

2
osi/dma/dma_local.h
View File

@@ -68,6 +68,7 @@ struct desc_ops {
/** Called to get receive checksum */
void (*get_rx_csum)(struct osi_rx_desc *rx_desc,
struct osi_rx_pkt_cx *rx_pkt_cx);
#ifndef OSI_STRIPPED_LIB
/** Called to get rx error stats */
void (*update_rx_err_stats)(struct osi_rx_desc *rx_desc,
struct osi_pkt_err_stats *stats);
@@ -77,6 +78,7 @@ struct desc_ops {
/** Called to get rx HASH from descriptor */
void (*get_rx_hash)(struct osi_rx_desc *rx_desc,
struct osi_rx_pkt_cx *rx_pkt_cx);
#endif /* !OSI_STRIPPED_LIB */
/** Called to get RX hw timestamp */
int (*get_rx_hwstamp)(struct osi_dma_priv_data *osi_dma,
struct osi_rx_desc *rx_desc,

36
osi/dma/eqos_desc.c
View File

@@ -23,6 +23,7 @@
#include "dma_local.h"
#include "hw_desc.h"
#ifndef OSI_STRIPPED_LIB
/**
* @brief eqos_get_rx_vlan - Get Rx VLAN from descriptor
*
@@ -77,6 +78,22 @@ static inline void eqos_update_rx_err_stats(struct osi_rx_desc *rx_desc,
}
}
/**
* @brief eqos_get_rx_hash - Get Rx packet hash from descriptor if valid
*
* Algorithm: This routine will be invoked by OSI layer itself to get received
* packet Hash from descriptor if RSS hash is valid and it also sets the type
* of RSS hash.
*
* @param[in] rx_desc: Rx Descriptor.
* @param[in] rx_pkt_cx: Per-Rx packet context structure
*/
static void eqos_get_rx_hash(OSI_UNUSED struct osi_rx_desc *rx_desc,
OSI_UNUSED struct osi_rx_pkt_cx *rx_pkt_cx)
{
}
#endif /* !OSI_STRIPPED_LIB */
/**
* @brief eqos_get_rx_csum - Get the Rx checksum from descriptor if valid
*
@@ -155,21 +172,6 @@ static void eqos_get_rx_csum(struct osi_rx_desc *rx_desc,
}
}
/**
* @brief eqos_get_rx_hash - Get Rx packet hash from descriptor if valid
*
* Algorithm: This routine will be invoked by OSI layer itself to get received
* packet Hash from descriptor if RSS hash is valid and it also sets the type
* of RSS hash.
*
* @param[in] rx_desc: Rx Descriptor.
* @param[in] rx_pkt_cx: Per-Rx packet context structure
*/
static void eqos_get_rx_hash(OSI_UNUSED struct osi_rx_desc *rx_desc,
OSI_UNUSED struct osi_rx_pkt_cx *rx_pkt_cx)
{
}
/**
* @brief eqos_get_rx_hwstamp - Get Rx HW Time stamp
*
@@ -237,9 +239,11 @@ static int eqos_get_rx_hwstamp(struct osi_dma_priv_data *osi_dma,
void eqos_init_desc_ops(struct desc_ops *d_ops)
{
d_ops->get_rx_csum = eqos_get_rx_csum;
#ifndef OSI_STRIPPED_LIB
d_ops->update_rx_err_stats = eqos_update_rx_err_stats;
d_ops->get_rx_vlan = eqos_get_rx_vlan;
d_ops->get_rx_hash = eqos_get_rx_hash;
#endif /* !OSI_STRIPPED_LIB */
d_ops->get_rx_csum = eqos_get_rx_csum;
d_ops->get_rx_hwstamp = eqos_get_rx_hwstamp;
}

4
osi/dma/eqos_dma.c
View File

@@ -137,7 +137,11 @@ static void eqos_debug_intr_config(struct osi_dma_priv_data *osi_dma)
*
* @param[in] ops: DMA channel operations pointer.
*/
#ifndef OSI_STRIPPED_LIB
void eqos_init_dma_chan_ops(struct dma_chan_ops *ops)
#else
void eqos_init_dma_chan_ops(OSI_UNUSED struct dma_chan_ops *ops)
#endif /* !OSI_STRIPPED_LIB */
{
#ifndef OSI_STRIPPED_LIB
ops->config_slot = eqos_config_slot;

39
osi/dma/libnvethernetcl_safety.export Normal file
View File

@@ -0,0 +1,39 @@
################################### tell Emacs this is a -*- makefile-gmake -*-
#
# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
#
# libnvethernetcl safety interface export
#
###############################################################################
osi_get_refill_rx_desc_cnt
osi_rx_dma_desc_init
osi_set_rx_buf_len
osi_hw_transmit
osi_process_tx_completions
osi_process_rx_completions
osi_hw_dma_init
osi_hw_dma_deinit
osi_init_dma_ops
osi_dma_get_systime_from_mac
osi_is_mac_enabled
osi_get_dma
osi_handle_dma_intr
osi_get_global_dma_status

61
osi/dma/mgbe_desc.c
View File

@@ -24,6 +24,7 @@
#include "hw_desc.h"
#include "mgbe_desc.h"
#ifndef OSI_STRIPPED_LIB
/**
* @brief mgbe_get_rx_vlan - Get Rx VLAN from descriptor
*
@@ -94,34 +95,6 @@ static inline void mgbe_update_rx_err_stats(struct osi_rx_desc *rx_desc,
}
}
/**
* @brief mgbe_get_rx_csum - Get the Rx checksum from descriptor if valid
*
* Algorithm:
* 1) Check if the descriptor has any checksum validation errors.
* 2) If none, set a per packet context flag indicating no err in
* Rx checksum
* 3) The OSD layer will mark the packet appropriately to skip
* IP/TCP/UDP checksum validation in software based on whether
* COE is enabled for the device.
*
* @param[in] rx_desc: Rx descriptor
* @param[in] rx_pkt_cx: Per-Rx packet context structure
*/
static void mgbe_get_rx_csum(struct osi_rx_desc *rx_desc,
struct osi_rx_pkt_cx *rx_pkt_cx)
{
unsigned int ellt = rx_desc->rdes3 & RDES3_ELLT;
/* Always include either checksum none/unnecessary
* depending on status fields in desc.
* Hence no need to explicitly add OSI_PKT_CX_CSUM flag.
*/
if ((ellt != RDES3_ELLT_IPHE) && (ellt != RDES3_ELLT_CSUM_ERR)) {
rx_pkt_cx->rxcsum |= OSI_CHECKSUM_UNNECESSARY;
}
}
/**
* @brief mgbe_get_rx_hash - Get Rx packet hash from descriptor if valid
*
@@ -157,7 +130,35 @@ static void mgbe_get_rx_hash(struct osi_rx_desc *rx_desc,
rx_pkt_cx->rx_hash = rx_desc->rdes1;
rx_pkt_cx->flags |= OSI_PKT_CX_RSS;
}
#endif /* !OSI_STRIPPED_LIB */
/**
* @brief mgbe_get_rx_csum - Get the Rx checksum from descriptor if valid
*
* Algorithm:
* 1) Check if the descriptor has any checksum validation errors.
* 2) If none, set a per packet context flag indicating no err in
* Rx checksum
* 3) The OSD layer will mark the packet appropriately to skip
* IP/TCP/UDP checksum validation in software based on whether
* COE is enabled for the device.
*
* @param[in] rx_desc: Rx descriptor
* @param[in] rx_pkt_cx: Per-Rx packet context structure
*/
static void mgbe_get_rx_csum(struct osi_rx_desc *rx_desc,
struct osi_rx_pkt_cx *rx_pkt_cx)
{
unsigned int ellt = rx_desc->rdes3 & RDES3_ELLT;
/* Always include either checksum none/unnecessary
* depending on status fields in desc.
* Hence no need to explicitly add OSI_PKT_CX_CSUM flag.
*/
if ((ellt != RDES3_ELLT_IPHE) && (ellt != RDES3_ELLT_CSUM_ERR)) {
rx_pkt_cx->rxcsum |= OSI_CHECKSUM_UNNECESSARY;
}
}
/**
* @brief mgbe_get_rx_hwstamp - Get Rx HW Time stamp
*
@@ -222,9 +223,11 @@ static int mgbe_get_rx_hwstamp(struct osi_dma_priv_data *osi_dma,
void mgbe_init_desc_ops(struct desc_ops *d_ops)
{
d_ops->get_rx_csum = mgbe_get_rx_csum;
#ifndef OSI_STRIPPED_LIB
d_ops->update_rx_err_stats = mgbe_update_rx_err_stats;
d_ops->get_rx_vlan = mgbe_get_rx_vlan;
d_ops->get_rx_hash = mgbe_get_rx_hash;
#endif /* !OSI_STRIPPED_LIB */
d_ops->get_rx_csum = mgbe_get_rx_csum;
d_ops->get_rx_hwstamp = mgbe_get_rx_hwstamp;
}

4
osi/dma/mgbe_dma.c
View File

@@ -118,7 +118,11 @@ static void mgbe_debug_intr_config(struct osi_dma_priv_data *osi_dma)
}
#endif
#ifndef OSI_STRIPPED_LIB
void mgbe_init_dma_chan_ops(struct dma_chan_ops *ops)
#else
void mgbe_init_dma_chan_ops(OSI_UNUSED struct dma_chan_ops *ops)
#endif
{
#ifndef OSI_STRIPPED_LIB
ops->config_slot = mgbe_config_slot;

4
osi/dma/osi_dma.c
View File

@@ -901,6 +901,7 @@ nve32_t osi_hw_transmit(struct osi_dma_priv_data *osi_dma, nveu32_t chan)
return hw_transmit(osi_dma, osi_dma->tx_ring[chan], chan);
}
#ifdef OSI_DEBUG
nve32_t osi_dma_ioctl(struct osi_dma_priv_data *osi_dma)
{
struct dma_local *l_dma = (struct dma_local *)osi_dma;
@@ -913,7 +914,6 @@ nve32_t osi_dma_ioctl(struct osi_dma_priv_data *osi_dma)
data = &osi_dma->ioctl_data;
switch (data->cmd) {
#ifdef OSI_DEBUG
case OSI_DMA_IOCTL_CMD_REG_DUMP:
reg_dump(osi_dma);
break;
@@ -923,7 +923,6 @@ nve32_t osi_dma_ioctl(struct osi_dma_priv_data *osi_dma)
case OSI_DMA_IOCTL_CMD_DEBUG_INTR_CONFIG:
l_dma->ops_p->debug_intr_config(osi_dma);
break;
#endif /* OSI_DEBUG */
default:
OSI_DMA_ERR(OSI_NULL, OSI_LOG_ARG_INVALID,
"DMA: Invalid IOCTL command", 0ULL);
@@ -932,6 +931,7 @@ nve32_t osi_dma_ioctl(struct osi_dma_priv_data *osi_dma)
return 0;
}
#endif /* OSI_DEBUG */
#ifndef OSI_STRIPPED_LIB

84
osi/dma/osi_dma_txrx.c
View File

@@ -32,47 +32,6 @@
static struct desc_ops d_ops[MAX_MAC_IP_TYPES];
#ifdef OSI_DEBUG
/**
* @brief get_rx_err_stats - Detect Errors from Rx Descriptor
*
* @note
* Algorithm:
* - This routine will be invoked by OSI layer itself which
* checks for the Last Descriptor and updates the receive status errors
* accordingly.
*
* @note
* API Group:
* - Initialization: No
* - Run time: Yes
* - De-initialization: No
*
* @param[in] rx_desc: Rx Descriptor.
* @param[in, out] pkt_err_stats: Packet error stats which stores the errors
* reported
*/
static inline void get_rx_err_stats(struct osi_rx_desc *rx_desc,
struct osi_pkt_err_stats *pkt_err_stats)
{
/* increment rx crc if we see CE bit set */
if ((rx_desc->rdes3 & RDES3_ERR_CRC) == RDES3_ERR_CRC) {
pkt_err_stats->rx_crc_error =
osi_update_stats_counter(
pkt_err_stats->rx_crc_error,
1UL);
}
/* increment rx frame error if we see RE bit set */
if ((rx_desc->rdes3 & RDES3_ERR_RE) == RDES3_ERR_RE) {
pkt_err_stats->rx_frame_error =
osi_update_stats_counter(
pkt_err_stats->rx_frame_error,
1UL);
}
}
#endif
/**
* @brief validate_rx_completions_arg- Validate input argument of rx_completions
*
@@ -141,7 +100,9 @@ nve32_t osi_process_rx_completions(struct osi_dma_priv_data *osi_dma,
struct osi_rx_desc *context_desc = OSI_NULL;
nveu32_t ip_type = osi_dma->mac;
nve32_t received = 0;
#ifndef OSI_STRIPPED_LIB
nve32_t received_resv = 0;
#endif /* !OSI_STRIPPED_LIB */
nve32_t ret = 0;
ret = validate_rx_completions_arg(osi_dma, chan, more_data_avail,
@@ -159,7 +120,11 @@ nve32_t osi_process_rx_completions(struct osi_dma_priv_data *osi_dma,
/* Reset flag to indicate if more Rx frames available to OSD layer */
*more_data_avail = OSI_NONE;
while ((received < budget) && (received_resv < budget)) {
while ((received < budget)
#ifndef OSI_STRIPPED_LIB
&& (received_resv < budget)
#endif /* !OSI_STRIPPED_LIB */
) {
rx_desc = rx_ring->rx_desc + rx_ring->cur_rx_idx;
/* check for data availability */
@@ -177,6 +142,7 @@ nve32_t osi_process_rx_completions(struct osi_dma_priv_data *osi_dma,
INCR_RX_DESC_INDEX(rx_ring->cur_rx_idx, osi_dma->rx_ring_sz);
#ifndef OSI_STRIPPED_LIB
if (osi_unlikely(rx_swcx->buf_virt_addr ==
osi_dma->resv_buf_virt_addr)) {
rx_swcx->buf_virt_addr = OSI_NULL;
@@ -189,6 +155,7 @@ nve32_t osi_process_rx_completions(struct osi_dma_priv_data *osi_dma,
}
continue;
}
#endif /* !OSI_STRIPPED_LIB */
/* packet already processed */
if ((rx_swcx->flags & OSI_RX_SWCX_PROCESSED) ==
@@ -229,19 +196,22 @@ nve32_t osi_process_rx_completions(struct osi_dma_priv_data *osi_dma,
* are set
*/
rx_pkt_cx->flags &= ~OSI_PKT_CX_VALID;
#ifndef OSI_STRIPPED_LIB
d_ops[ip_type].update_rx_err_stats(rx_desc,
&osi_dma->pkt_err_stats);
#endif /* !OSI_STRIPPED_LIB */
}
/* Check if COE Rx checksum is valid */
d_ops[ip_type].get_rx_csum(rx_desc, rx_pkt_cx);
#ifndef OSI_STRIPPED_LIB
/* Get Rx VLAN from descriptor */
d_ops[ip_type].get_rx_vlan(rx_desc, rx_pkt_cx);
/* get_rx_hash for RSS */
d_ops[ip_type].get_rx_hash(rx_desc, rx_pkt_cx);
#endif /* !OSI_STRIPPED_LIB */
context_desc = rx_ring->rx_desc + rx_ring->cur_rx_idx;
/* Get rx time stamp */
ret = d_ops[ip_type].get_rx_hwstamp(osi_dma, rx_desc,
@@ -281,15 +251,18 @@ nve32_t osi_process_rx_completions(struct osi_dma_priv_data *osi_dma,
return -1;
}
}
#ifndef OSI_STRIPPED_LIB
osi_dma->dstats.q_rx_pkt_n[chan] =
osi_update_stats_counter(
osi_dma->dstats.q_rx_pkt_n[chan],
1UL);
osi_dma->dstats.rx_pkt_n =
osi_update_stats_counter(osi_dma->dstats.rx_pkt_n, 1UL);
#endif /* !OSI_STRIPPED_LIB */
received++;
}
#ifndef OSI_STRIPPED_LIB
/* If budget is done, check if HW ring still has unprocessed
* Rx packets, so that the OSD layer can decide to schedule
* this function again.
@@ -306,10 +279,11 @@ nve32_t osi_process_rx_completions(struct osi_dma_priv_data *osi_dma,
*more_data_avail = OSI_ENABLE;
}
}
#endif /* !OSI_STRIPPED_LIB */
return received;
}
#ifndef OSI_STRIPPED_LIB
/**
* @brief inc_tx_pkt_stats - Increment Tx packet count Stats
*
@@ -439,7 +413,6 @@ static inline void get_tx_err_stats(struct osi_tx_desc *tx_desc,
}
}
#ifndef OSI_STRIPPED_LIB
nve32_t osi_clear_tx_pkt_err_stats(struct osi_dma_priv_data *osi_dma)
{
nve32_t ret = -1;
@@ -568,9 +541,10 @@ int osi_process_tx_completions(struct osi_dma_priv_data *osi_dma,
txdone_pkt_cx = &tx_ring->txdone_pkt_cx;
entry = tx_ring->clean_idx;
#ifndef OSI_STRIPPED_LIB
osi_dma->dstats.tx_clean_n[chan] =
osi_update_stats_counter(osi_dma->dstats.tx_clean_n[chan], 1U);
#endif /* !OSI_STRIPPED_LIB */
while ((entry != tx_ring->cur_tx_idx) && (entry < osi_dma->tx_ring_sz) &&
(processed < budget)) {
osi_memset(txdone_pkt_cx, 0U, sizeof(*txdone_pkt_cx));
@@ -594,11 +568,15 @@ int osi_process_tx_completions(struct osi_dma_priv_data *osi_dma,
if (((tx_desc->tdes3 & TDES3_ES_BITS) != 0U) &&
(osi_dma->mac != OSI_MAC_HW_MGBE)) {
txdone_pkt_cx->flags |= OSI_TXDONE_CX_ERROR;
#ifndef OSI_STRIPPED_LIB
/* fill packet error stats */
get_tx_err_stats(tx_desc,
&osi_dma->pkt_err_stats);
#endif /* !OSI_STRIPPED_LIB */
} else {
#ifndef OSI_STRIPPED_LIB
inc_tx_pkt_stats(osi_dma, chan);
#endif /* !OSI_STRIPPED_LIB */
}
if (processed < INT_MAX) {
@@ -815,11 +793,19 @@ static inline unsigned int is_ptp_onestep_and_master_mode(unsigned int ptp_flag)
* @param[in, out] tx_desc: Pointer to transmit descriptor to be filled.
* @param[in] tx_swcx: Pointer to corresponding tx descriptor software context.
*/
#ifndef OSI_STRIPPED_LIB
static inline void fill_first_desc(struct osi_tx_ring *tx_ring,
struct osi_tx_pkt_cx *tx_pkt_cx,
struct osi_tx_desc *tx_desc,
struct osi_tx_swcx *tx_swcx,
unsigned int ptp_flag)
#else
static inline void fill_first_desc(OSI_UNUSED struct osi_tx_ring *tx_ring,
struct osi_tx_pkt_cx *tx_pkt_cx,
struct osi_tx_desc *tx_desc,
struct osi_tx_swcx *tx_swcx,
unsigned int ptp_flag)
#endif /* !OSI_STRIPPED_LIB */
{
tx_desc->tdes0 = L32(tx_swcx->buf_phy_addr);
tx_desc->tdes1 = H32(tx_swcx->buf_phy_addr);
@@ -878,6 +864,7 @@ static inline void fill_first_desc(struct osi_tx_ring *tx_ring,
tx_desc->tdes3 &= ~TDES3_TPL_MASK;
tx_desc->tdes3 |= tx_pkt_cx->payload_len;
} else {
#ifndef OSI_STRIPPED_LIB
if ((tx_ring->slot_check == OSI_ENABLE) &&
(tx_ring->slot_number < OSI_SLOT_NUM_MAX)) {
/* Fill Slot number */
@@ -886,6 +873,7 @@ static inline void fill_first_desc(struct osi_tx_ring *tx_ring,
tx_ring->slot_number = ((tx_ring->slot_number + 1U) %
OSI_SLOT_NUM_MAX);
}
#endif /* !OSI_STRIPPED_LIB */
}
}
@@ -1015,6 +1003,7 @@ nve32_t hw_transmit(struct osi_dma_priv_data *osi_dma,
return -1;
}
#ifndef OSI_STRIPPED_LIB
/* Context descriptor for VLAN/TSO */
if ((tx_pkt_cx->flags & OSI_PKT_CX_VLAN) == OSI_PKT_CX_VLAN) {
osi_dma->dstats.tx_vlan_pkt_n =
@@ -1027,6 +1016,7 @@ nve32_t hw_transmit(struct osi_dma_priv_data *osi_dma,
osi_update_stats_counter(osi_dma->dstats.tx_tso_pkt_n,
1UL);
}
#endif /* !OSI_STRIPPED_LIB */
cntx_desc_consumed = need_cntx_desc(tx_pkt_cx, tx_swcx, tx_desc,
osi_dma->ptp_flag, osi_dma->mac);
@@ -1406,9 +1396,11 @@ static nve32_t tx_dma_desc_init(struct osi_dma_priv_data *osi_dma)
tx_ring->cur_tx_idx = 0;
tx_ring->clean_idx = 0;
#ifndef OSI_STRIPPED_LIB
/* Slot function parameter initialization */
tx_ring->slot_number = 0U;
tx_ring->slot_check = OSI_DISABLE;
#endif /* !OSI_STRIPPED_LIB */
set_tx_ring_len_and_start_addr(osi_dma, tx_ring->tx_desc_phy_addr,
chan, (osi_dma->tx_ring_sz - 1U));