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osi: eqos: Keep the reset value for T264 EQOS

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Issue: Ethernet driver is programming the ASID - 0x3
for EQOS IP which is different from the value passed from DT.
It resulted SMMU/memory issues while performing data transfers

Fix: Keep the on reset values for T264 EQOS since lower
8-bits of ASID (0x160) needs to program in ASID registers of EQOS IP.

Bug 4701860

Change-Id: I2c799554d054103bea4c8a05a7bdd0961be81683
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/3159696
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Tested-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Narayana Reddy P <narayanr@nvidia.com>
This commit is contained in:
Bhadram Varka
2024-06-19 12:14:35 +00:00
committed by mobile promotions
parent c479ba1650
commit a89360f8db
1 changed files with 9 additions and 2 deletions
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9
osi/core/eqos_core.c
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@@ -1199,8 +1199,15 @@ static nve32_t eqos_core_init(struct osi_core_priv_data *const osi_core)
(nveu8_t *)osi_core->base + EQOS_MMC_CNTRL);
#ifndef OSI_STRIPPED_LIB
/* Configure ASID */
if (osi_core->mac_ver == OSI_EQOS_MAC_5_30) {
/* Configure ASID for T234 EQOS
* Keep the on reset value for T264 EQOS
* which is zero since EQOS SID is 0x160
* and driver needs to program lower 8 bit values
* which will be zero for T264
*/
eqos_configure_asid(osi_core);
}
/* Mapping MTL Rx queue and DMA Rx channel */
if (osi_core->dcs_en == OSI_ENABLE) {