nvethernetrm: fix AXI clock to 125MHz

Fixes incorrect number of rx interrupt triggered with
rx coalescing (rx-usecs in ethtool) parameter.

Bug 200529168

Change-Id: I49ea2c469667e05f7e12f2741984f609127f395c
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2229564
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Ajay Gupta
2019-10-31 11:23:32 -07:00
committed by Bhadram Varka
parent fc33a1e516
commit d7ecf48908
3 changed files with 21 additions and 9 deletions

View File

@@ -35,8 +35,6 @@
#define OSI_NSEC_PER_SEC 1000000000ULL
#define OSI_INVALID_VALUE 0xFFFFFFFFU
/* System clock is 62.5MHz */
#define OSI_ETHER_SYSCLOCK 62500000U
#define OSI_PTP_REQ_CLK_FREQ 250000000U
#define OSI_ONE_MEGA_HZ 1000000U
#define OSI_MAX_RX_COALESCE_USEC 1020U