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Author SHA1 Message Date
Om Prakash Singh
70bf517f34 osi: core: add support for HSI error injection 
Add new osi ioctl command OSI_CMD_HSI_INJECT_ERR for
IP specific error injection configuration.
different type of error is injected based on input
error code value.

Bug 3806923
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Change-Id: I01269d211293aa67471fadcf6e349f049f9c1a51
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2786840
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-11-09 11:18:59 -08:00
Om Prakash Singh
aaf12511a3 osi: core: enable HSI_SUPPORT and fix MISRA issue 
enable HSI_SUPPORT at OSI unit level and address
misra issues.

Bug 3590939
Change-Id: Ia87bafe077553d0140219047a578100c3f5684aa
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2784224
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-11-09 11:18:49 -08:00
Om Prakash Singh
b35c75e1db osi: core: add SW error code for XPCS write failure 
As return specific error code on PCS read-after-write fails.
And add SW error code to report for FSI on failure.

Bug 3792855

Change-Id: I51b8a088247d98621750af7bb42100a078c083c2
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2781195
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-11-09 11:18:39 -08:00
Om Prakash Singh
30475a497f osi: core: use u16 type for reporter ID 
reporter IDs are u16 type for error reporting API

Bug 3590939

Change-Id: Iae56610dce407fbf8d4b3a1ea67d3f568c22a681
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2781194
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-11-09 11:18:29 -08:00
Om Prakash Singh
e8fbce237c osi: core: Disable HSI causing problem 
1) Disable PCS FEC_EN programming as should be enabled only
   for autonagotiation mode and phy support is also needed.
   Current phy AQR113C does not has FEC capability (Bug 3799112)
2) Enabling MAC_FSM_CONTROL.TMOUTEN cauing uncorrected error
   on boot (Bug 3584387)

Bug 3590939
Change-Id: Ib5491c64c1028e312470d113934848098e2b0fd5
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2777890
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Mohan Thadikamalla <mohant@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Tested-by: Sanath Kumar Gampa <sgampa@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-11-09 11:18:18 -08:00
Om Prakash Singh
36a6a3d487 osi: core: macsec: enable SECURE_REG_VIOL intr 
enable SECURE_REG_VIOL interrupt to generate
uncorrected Error for illegal access errors
for MACSEC Registers

Bug 3590939

Change-Id: I4f50c1b709ed3662eb6062dcbbbe42a8e36f101c
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2767836
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-11-09 11:18:14 -08:00
Narayan Reddy
81242cd874 osi: core: Fix misc optimizations 
1) remove duplicate checks
2) remove unused APIs
3) moved to STRIPPED if not used

Bug 3701869

Change-Id: Id6ba8649ff5135affa949ea8dde947db10003f80
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2784309
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-11-04 16:17:25 -07:00
Zhongjie Wang
4a9893133d osi: dma: using swcx to store nvsocket rx data idx 
- Added a data_idx field in rx swcx to store nvsocket data index.
  Tx data idx has been added in a earlier commit.

Jira NET-242

Change-Id: I81e4c41efceabab4dbf556ac3f57ca26e0737a81
Signed-off-by: Zhongjie Wang <zhowang@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2778530
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-10-25 18:05:24 -07:00
Diptanshu Jamgade
4a8382d6fb nvethernetrm: update OSI_PAUSE_FRAMES_ENABLE macro 
Update OSI_PAUSE_FRAMES_ENABLE as per the updated
DT-bindings.

Bug 3529804

Change-Id: Ice290ef85c370956cec2a7b29cc0b6f82ac39093
Signed-off-by: Diptanshu Jamgade <djamgade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2790122
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-10-20 02:13:37 -07:00
Bhadram Varka
53ced9c16b osi: core: Handle common interrupts before de-init 
Issue: During resume common interrupt raised for XPCS
remote and local link faults for MGBE0_0 on FS.
It resulted raising scheduling lane bring up through
workqueue but by that time driver is not ready handle
the data transfers.

Fix: Disable the common interrupts and handle the same
if there are any pending interrupts.

Bug 3812764

Change-Id: Ia647e46ef66d8687e1173873af8d8b67f2d7cc4b
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2793960
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-10-18 20:43:06 -07:00
Hareesh Kesireddy
9e686def56 osi: dma: align total rx buf length to 16 bytes 
Bug 3820633

Change-Id: I85adcb3d9093b26811f8174a8b8712fc27d29a42
Signed-off-by: Hareesh Kesireddy <hkesireddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2789959
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-10-18 05:19:05 -07:00
Narayan Reddy
93e974730a osi: dma: mgbe: set rx checksum flags 
Check if the descriptor has any checksum validation errors.
If none, set a per packet context flag indicating no err in
Rx checksum so that OSD layer will mark the packet appropriately
to skip TCP/UDP checksum validation in case of QNX

Bug 3725941

Change-Id: Ifa5fff35cc776bf72b96943835dbd2c1b6d44df2
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2691195
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-10-18 05:13:45 -07:00
Bhadram Varka
492fa1868d osi: core: remove safety backup and save/restore code 
Bug 3701869

Change-Id: Ib2b139db7c8829d01f57581a18506ba6641cd4ab
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2787478
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-10-06 17:26:44 -07:00
Narayan Reddy
4c85b5e49e osi: core: Fix MISRA issues 
===== DIFF ======
Total misra violation count changed by -71
Rule: MISRA_C-2012_Directive_4.5 Diff: -3
Rule: MISRA_C-2012_Rule_11.1 Diff: -5
Rule: MISRA_C-2012_Rule_11.3 Diff: -1
Rule: MISRA_C-2012_Rule_11.5 Diff: 1
Rule: MISRA_C-2012_Rule_12.1 Diff: -6
Rule: MISRA_C-2012_Rule_12.2 Diff: -7
Rule: MISRA_C-2012_Rule_15.1 Diff: -1
Rule: MISRA_C-2012_Rule_15.6 Diff: -1
Rule: MISRA_C-2012_Rule_16.1 Diff: -1
Rule: MISRA_C-2012_Rule_16.3 Diff: -1
Rule: MISRA_C-2012_Rule_17.7 Diff: -4
Rule: MISRA_C-2012_Rule_17.8 Diff: -5
Rule: MISRA_C-2012_Rule_2.4 Diff: -4
Rule: MISRA_C-2012_Rule_2.5 Diff: -18
Rule: MISRA_C-2012_Rule_20.5 Diff: -1
Rule: MISRA_C-2012_Rule_5.6 Diff: -1
Rule: MISRA_C-2012_Rule_5.8 Diff: -1
Rule: MISRA_C-2012_Rule_5.9 Diff: -4
Rule: MISRA_C-2012_Rule_8.3 Diff: -2
Rule: MISRA_C-2012_Rule_8.9 Diff: -5
Rule: MISRA_C-2012_Rule_9.5 Diff: -1
Rule: Total Diff: -71

Bug 3695218

Change-Id: I9bd904f8a77195ca34fb2d47639a214f0083ccf7
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2776281
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-09-29 19:38:37 -07:00
Bhadram Varka
5fba408c31 osi: mgbe: configure MTL RXFIFO and flow control 
MTL RXFIFO memory available for MGBE - 192KB
Below is the distribution -
1) Q0 - 160KB
2) Q1 to Q8 - 2KB
3) Q9 - 16KB

It also update flow control parameters for
the Rx queues
1) Q0 - FULL_MINUS_32K
2) Q1 to Q9 - FULL_MINUS_1_5K

Bug 3787316

Change-Id: I3049d742e784aa3273090191856482121a3e1d3e
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2779472
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-09-28 12:47:58 -07:00
Narayan Reddy
5750d03d79 osi: core: Fix CERT/CERT ADV/Coverity issues 
**CERT report**
===== DIFF ======
Total cert violation count changed by -34
Rule: CERT_INT30-C Diff: -22
Rule: CERT_INT31-C Diff: -2
Rule: CERT_INT32-C Diff: -10
Rule: Total Diff: -34
**CERT ADV report**
===== DIFF ======
Total cert_adv violation count changed by -13
Rule: CERT_DCL37-C Diff: 1
Rule: CERT_EXP39-C Diff: -13
Rule: CERT_INT34-C Diff: -1
Rule: Total Diff: -13
**Coverity report**
===== DIFF ======
Total coverity violation count changed by -1
Rule: UNUSED_VALUE Diff: -1
Rule: Total Diff: -1

undef DRIFT_CAL since no longer used

Bug 3695218

Change-Id: I6638e2954ec2a74a66a756713b389610534d207a
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2776244
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-09-26 16:09:10 -07:00
Rakesh Goyal
80575def01 nvethernetrm: support L2 filter from ioctls 
Move L2 and L3 structure to osi_core as new structure
at OSD level created to user data.
Number of max L2 filter check based on mac version.

Bug 3659048

Change-Id: I9e1e7c015e8c3a0579a363ccd6bcfe9d84e67eea
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2777333
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-09-24 13:21:25 -07:00
Bhadram Varka
2e7039e6ed osi: dma: Fix CERT issues 
Analysis summary report:
Defects/Coding rule violations found : 3 Total
        CERT_INT30-C     3 - (Deviation Not approved)
        Total    3
===== DIFF ======
Total cert violation count changed by -44
Rule: CERT_INT30-C Diff: -44
Rule: Total Diff: -44

Jira NET-224

Change-Id: I0cdbece05a61f4b22e4447d7cedc6ca401bd5736
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2772787
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-09-21 15:18:33 -07:00
Bhadram Varka
ddda3e6384 osi: dma: increment rx_buf_len for alignment 
Issue: If the DMA buffer address is not aligned with
EQOS/MGBE system bus width then data will be lost.

Fix: Add 15bytes extra at head portion for alignment
and 15byte extra to cover tail portion of the buffer.

Bug 3572785

Change-Id: Ic0ce1e052cb6e952eba25fbc0cf696affca605cb
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2716666
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Hareesh Kesireddy <hkesireddy@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-09-21 12:46:28 -07:00
Rakesh Goyal
fdf60cfb28 nvethernetrm: update filename and location 
Update file name to be added in SDK

Bug 3704251

Change-Id: Ibc6b53a6c152973f249d8af94a33cd537b1ea7ec
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2778302
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-09-21 01:13:51 -07:00
Sanath Kumar Gampa
0addd2969b osi: macsec: Fix CERT INT31-C issues in macsec 
Bug 3745813

Change-Id: I36ea0483857d82bc60277be33f279057689ffef1
Signed-off-by: Sanath Kumar Gampa <sgampa@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2763014
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Mahesh Patil <maheshp@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-09-15 07:25:29 -07:00
Rakesh Goyal
6b4ddb8043 nvethernetrm: take exported ioctl related header out 
Issue: SW needs to support IOCTL on safety builds and
these header should be exposed to user

Fix: Create new header file which is exposed externally
     Fix Coverity issues
     Enable TSN and FRP for safety build
     Optimize the code between eqos and mgbe

Bug 3704251

Change-Id: I2807f8283a296de1f96d3f902cb4ad5a4781be50
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2759333
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
 2022-09-12 20:52:00 -07:00
Hareesh Kesireddy
744ff93208 osi: dma: provide choice for driver to skip dmb 
- Added a skip dmb flag in tx_ring to let driver
  decide whether barrier need to be performed or not.
- Using rsvd1 in tx swcx for storing nvsocket data index.

Bug 3672681
Jira NET-332

Change-Id: Ie35b7487c6ba2ae92acd46ec51ec4342b856e404
Signed-off-by: Hareesh Kesireddy <hkesireddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2771038
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-09-11 23:37:21 -07:00
Bhadram Varka
f77e6e4eb6 osi: dma: Fix MISRA issues 
===== DIFF ======
Total misra violation count changed by -162
Rule: MISRA_C-2012_Directive_4.6 Diff: -13
Rule: MISRA_C-2012_Directive_4.9 Diff: 5
Rule: MISRA_C-2012_Rule_10.1 Diff: -2
Rule: MISRA_C-2012_Rule_11.3 Diff: -15
Rule: MISRA_C-2012_Rule_11.5 Diff: 15
Rule: MISRA_C-2012_Rule_12.2 Diff: -2
Rule: MISRA_C-2012_Rule_15.1 Diff: 64
Rule: MISRA_C-2012_Rule_15.4 Diff: 5
Rule: MISRA_C-2012_Rule_15.5 Diff: -76
Rule: MISRA_C-2012_Rule_15.6 Diff: -1
Rule: MISRA_C-2012_Rule_15.7 Diff: -2
Rule: MISRA_C-2012_Rule_16.4 Diff: -1
Rule: MISRA_C-2012_Rule_2.3 Diff: -2
Rule: MISRA_C-2012_Rule_2.4 Diff: -1
Rule: MISRA_C-2012_Rule_2.5 Diff: -106
Rule: MISRA_C-2012_Rule_5.7 Diff: -1
Rule: MISRA_C-2012_Rule_5.9 Diff: -6
Rule: MISRA_C-2012_Rule_8.13 Diff: -18
Rule: MISRA_C-2012_Rule_8.2 Diff: -1
Rule: MISRA_C-2012_Rule_8.3 Diff: -2
Rule: MISRA_C-2012_Rule_8.9 Diff: -2
Rule: Total Diff: -162
*******************CERT report
Analysis summary report:
Defects/Coding rule violations found : 47 Total
	CERT_INT30-C 	 47 - (Deviation Not approved)
	Total 	 47
===== DIFF ======
Total cert violation count changed by -16
Rule: CERT_INT30-C Diff: -16
Rule: Total Diff: -16
*******************CERT ADV report
Analysis summary report:
Defects/Coding rule violations found : 36 Total
	CERT_DCL37-C (Full Deviation) 	 36 - (Deviation Approved)
	Total 	 36
===== DIFF ======
Total cert_adv violation count changed by -76
Rule: CERT_DCL37-C Diff: -62
Rule: CERT_EXP39-C Diff: -14
Rule: Total Diff: -76

JIRA NET-224

Change-Id: I2084da3d98646e6f9fb7933adbee39343e509e8d
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2744955
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-09-09 11:15:17 -07:00
Narayan Reddy
e03254a23d osi: core: combine config_l3_l4_filter_enable 
Bug 3701869

Change-Id: Ic36cb61075495589c9aaf9bafb7ce1eeda4de673
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2740674
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-09-08 21:02:01 -07:00
Narayan Reddy
d3bd103871 osi: core: combine config_mac_pkt_filter_reg 
Bug 3701869

Change-Id: I603bd57511f115fb5af42dca2a5804cf4926ebbb
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2740658
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-09-08 21:01:51 -07:00
Narayan Reddy
aaf6974715 osi: core: combine core_deinit 
Bug 3701869

Change-Id: I985e909803f8de858f2c6a8020f9c77eaa75951d
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2740574
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-09-08 21:01:47 -07:00
Narayan Reddy
28053a560e osi: core: fix misra 2.x rules 
===== DIFF ======
Total misra violation count changed by -591
Rule: MISRA_C-2012_Rule_2.2 Diff: -1
Rule: MISRA_C-2012_Rule_2.3 Diff: -3
Rule: MISRA_C-2012_Rule_2.4 Diff: -2
Rule: MISRA_C-2012_Rule_2.5 Diff: -585
Rule: Total Diff: -591

Bug 3695218

Change-Id: I57e85ba94f434cb3bd729b4f5f75bb4a592fb279
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2768383
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-09-02 04:58:41 -07:00
Narayan Reddy
f816ebf1e8 osi: core: fix misra 4.6 rule 
===== DIFF ======
Total misra violation count changed by -240
Rule: MISRA_C-2012_Directive_4.6 Diff: -240
Rule: Total Diff: -240

Bug 3695218

Change-Id: Ida2d3a775872637eda3058ea361a00346c86f7f7
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2767895
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-08-30 00:05:29 -07:00
Rakesh Goyal
d31916e761 core: configure ETS as default selection algorithm 
Issue: Default TX selection is SP, due to which
highest TX queue get most of TX bandwidth.

Fix: Set ETS as selection policy (WRR)with equal
weights given to all Tx Queue.
 Set default configuration on disabling CBS.

Bug 3735907

Change-Id: I33b849695641ceaeef77ff819121d51e132214aa
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2749330
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-08-29 05:12:48 -07:00
Narayan Reddy
02e8ac20c5 osi: core: combine ptp_tsc_capture 
Bug 3701869

Change-Id: Ib8b2ea895866e2d260aa5e5aa753ecfd49b663ae
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2740494
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-08-25 19:06:59 -07:00
Narayan Reddy
cc6c76912d osi: core: combine config_ssir 
1) Combine config_ssir
2) Store MAC version in local core/dma variable for differentiating across SoCs.

Bug 3701869

Change-Id: I43dd9f7d2194191d849ea10f15b84b2c40111ee0
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2740328
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-08-25 19:06:47 -07:00
Narayan Reddy
f20eda41e2 osi: core: combine config_tscr 
Bug 3701869

Change-Id: I1eb04dd9cf439ce55b1bdc6df73f793af85eddcd
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2740317
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-08-25 19:06:41 -07:00
Narayan Reddy
cc9c350697 osi: core: combine config_addend 
Bug 3701869

Change-Id: I6a656ac72e8d87b96ac9efa9bf9e1c9a979306b1
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2740109
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-08-25 19:06:34 -07:00
Narayan Reddy
3b34cf8978 osi: core: combine set_systime_to_mac 
Bug 3701869

Change-Id: I7df8c486b9fea489bf16c700d93e070f0d455dd2
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2740056
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-08-25 19:06:27 -07:00
Bhadram Varka
8592447094 osi: Pass OSD pointer for better logging 
Issue: Currently logs don't have any IP/inteface specific
name to indicate that from which IP/interface these
logs are coming.

Fix: Pass OSD pointer so that interface or device name
can be added to the logs.

Reduce XPCS logging

Bug 3719492
Bug 3722532

Change-Id: Id909b14f24f441ab40ff6497f1998aeb4ab34611
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2745731
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-08-20 23:31:07 -07:00
Narayan Reddy
3bf72bdd4a mgbe: core: call lane bringup on local fault 
call lane bringup when there are local faults
and stop the network queues.
restart the network queues when proper link is up

Bug 3744088
Bug 3654543
Bug 3665378

Change-Id: I33180c965b29543dcdfb0d8f611be06b6b97a42e
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2730882
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2022-08-17 10:38:17 -07:00
Nagaraj Annaiah
e554fc4f0e osi: core: xpcs: Reduce PCS lock time out. 
Issue: Longer PCS delay causes IVC time out.

Fix: Reduce PCS delay loop to 5 Micro sec.

Bug 3688266

Change-Id: Ide7e90b2eb62034ad55ba406dbcfe1d56687573b
Signed-off-by: Nagaraj Annaiah <nannaiah@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2737257
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-08-12 11:01:01 -07:00
Mahesh Patil
7a5d06ad23 osi: core: Change macsec log level 
Change macsec log level for general prints and disable DEBUG_MACSEC
macro for safety build

Bug 3708920

Change-Id: Iec9b28d0e1eeb4ceb17767d7311cb7945a42009d
Signed-off-by: Mahesh Patil <maheshp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2745325
Reviewed-by: Nagaraj Annaiah <nannaiah@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2022-08-10 09:50:51 -07:00
Bhadram Varka
0417da8260 osi: dma: compile out not required code for Safety QNX 
Bug 200770328

Change-Id: I8ee51c89954b47ceff5e261b6a2d8cc6b3f16f36
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2735897
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2022-08-06 05:04:20 -07:00
Narayan Reddy
f971d40513 osi: core: skip out not required code for Safety QNX 
Bug 3701869

Change-Id: Ic1f676708ff6e3faf7dbed09f0e7048448252e57
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2739627
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Bhadram Varka <vbhadram@nvidia.com>
 2022-08-06 05:04:15 -07:00
Bhadram Varka
10cf119429 osi: dma: mgbe: fix regression RWTU programming 
Bug 200770328

Change-Id: I738daa23df274c5f8e485829c3876ef96310015f
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2754972
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2022-08-03 07:36:06 -07:00
Sanath Kumar Gampa
aedaf1db80 osi: macsec API cleanup 
Bug 3709820

Change-Id: I935ca2d373bea1b7d8b15f790ffc3719fa9d0881
Signed-off-by: Sanath Kumar Gampa <sgampa@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2738227
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Mahesh Patil <maheshp@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2022-07-26 10:06:20 -07:00
Narayan Reddy
071fe395fd osi: core: combine config_rxcsum_offload 
Bug 3701869

Change-Id: I802497b6f973c69b994373697251964e532243f7
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2739139
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-07-13 16:28:25 -07:00
Narayan Reddy
be51977e02 osi: core: combine config_fw_err_pkts 
Bug 3701869

Change-Id: I5a0fe6e24d8aa69054a18f927d7135552482e8b9
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2739131
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-07-13 16:28:15 -07:00
Narayan Reddy
46f06fed42 osi: core: combine flush_mtl_tx_queue 
Bug 3701869

Change-Id: Ifea025c0eb2d4373a348283aaa93eb7d0eca193a
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2739121
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-07-13 16:28:04 -07:00
Narayan Reddy
16934a83e6 osi: core: combine set_speed 
Bug 3701869

Change-Id: Ie41b31e94f0ec0fb0b8d2d52cca7fafa81fd54c2
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2738062
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-07-13 16:27:54 -07:00
Narayan Reddy
9ada234fa2 osi: core: combine set_mode 
Bug 3701869

Change-Id: I01d8e45b5818277441775d17e332c246ffa13a0e
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2738021
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2022-07-13 16:27:44 -07:00
Narayan Reddy
e6698c799b osi: core: combine stop_mac 
Bug 3701869

Change-Id: I27a16c3f7c088be815b36d416ae068b5e60db143
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2738006
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2022-07-13 16:27:40 -07:00
Narayan Reddy
948eb47379 osi: core: combine start_mac 
Bug 3701869

Change-Id: Ice5ea78f32da1641cc847138869df97149eb72c9
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2737988
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2022-07-13 16:27:35 -07:00