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a19a5a80bde7eb8274d49d85a25a756dbd55ab7e
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46 Commits

Author SHA1 Message Date
Narayan Reddy
a19a5a80bd osi: core: combine set_speed 
Bug 3701869

Change-Id: Ie41b31e94f0ec0fb0b8d2d52cca7fafa81fd54c2
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2738062
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2024-02-21 16:32:06 +05:30
Narayan Reddy
9ab0b61bfa osi: core: combine set_mode 
Bug 3701869

Change-Id: I01d8e45b5818277441775d17e332c246ffa13a0e
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2738021
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2024-02-21 16:32:06 +05:30
Narayan Reddy
a67b77e501 osi: core: combine stop_mac 
Bug 3701869

Change-Id: I27a16c3f7c088be815b36d416ae068b5e60db143
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2738006
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2024-02-21 16:32:06 +05:30
Narayan Reddy
287352f3ad osi: core: combine start_mac 
Bug 3701869

Change-Id: Ice5ea78f32da1641cc847138869df97149eb72c9
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2737988
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2024-02-21 16:32:06 +05:30
Bhadram Varka
586252598f osi: core: common poll_for_swr 
Combine MGBE/EQOS HW level functions into single function.

Bug 3701869

Change-Id: I02c4881ec95cc5637867d68e560f4790c3548737
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2732106
Reviewed-by: Krishna Thota <kthota@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2024-02-21 16:32:06 +05:30
Rakesh Goyal
7bcef9fd39 nvethenetrm: core: SW WAR implementation for switching of Gates 
Issue: switching of Gates did not happen for
intermediate cycles when CTR is
less than GCL execution time

Fix: SW WAR as per recommendation.
1) At the programming time make sure
  (CTR - total TI) should be 0 or more than
  8PTP clock time.
2) Switching to New List
   check for following
   Old BTR + n(CTR) - New GCL list's BTR >= 8PTP or
   New GCL list's BTR – (Old BTR + n(CTR)) >= 8PTP

Bug 200724911

Change-Id: I19127a134655a66bb66d025f964b85afc6c23c2e
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2622942
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2024-02-21 16:32:06 +05:30
Bhadram Varka
93c142ba2a delete the directories to move the history 
Change-Id: I701c1a8c6c891dc8ee2781d51c2c6ad748ed5bf3
 2024-02-21 16:31:52 +05:30
Bhadram Varka
232ce3ef80 osi: core: support pause frames 
Enable pause frames for Safety builds as well based
on pause_frames if the osi_core->pause_frames is
set to OSI_PAUSE_FRAMES_ENABLE based on DT parameter
nvidia,pause_frames.

Bug 4186472

Change-Id: I8600ae0ce1a9d9a5dd132a949ec14e8d73735319
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2931298
(cherry picked from commit b553b09358e1b4dbce8529c756f013b528f27862)
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2931295
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Hareesh Kesireddy <hkesireddy@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-08-31 16:23:29 -07:00
Mohan Thadikamalla
163e9cf67c osi: core: Add OSI_CMD_READ_HSI_ERR command 
Issue:
Observed HSI diagnostic timer execution is taking
more than MAX_PROC_TIME due to OSI_CMD_READ_MMC
execution time. As this is reading 151 MMC
registers for MGBE and 91 registers for EQOS.

Fix:
As this OSI_CMD_READ_MMC command execution is not
meeting the MAX_PROC_TIME, add new OSI_CMD_READ_HSI_ERR
command only to read 5 MMC error registers.

Bug 4069585

Change-Id: I38a10b7f09ac7614d548b5caa4203f1c94889908
Signed-off-by: Mohan Thadikamalla <mohant@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2895845
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-05-10 06:28:28 -07:00
Bhadram Varka
c6382f708e osi: mgbe: Enable LSI only after UPHY lane bring up 
Issue: During boot or interface up/down test local
fault interrupts observed during UPHY lane bring up
and which resuts in scheduling the UPHY lane bring up
again. With this HW is generating the continuous local
faults and link ok interrupts. This causes CPU to stall.

Fix:
Enable Link Status interrupt only after the PCS block
lock is a success.

Bug 4076432

Change-Id: I00049900d5d687cc043b184a7b87cc68a2651aea
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2893961
(cherry picked from commit 438811eb89ab5826df17349c1be9128d28e897f1)
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2894369
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-04-28 08:10:57 -07:00
Rakesh Goyal
f3a4320760 osi: core: add m2m sync error detection and reporting 
Issue: New safety requirement to detect
and report M2M eqos sync error.

Fix: add support for error detection and
reporting.

Bug 4033627

Change-Id: I377b8f11a6518841e21fe9e1ab3682447b31138b
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2875581
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-04-01 10:51:54 -07:00
Narayan Reddy
a65d45e6c9 osi: core: add PHY write verify err inject support 
Add PHY write verify HSI error injection support

Bug 3510868

Change-Id: I371f24b9eb9a9e422d3e61e76820d32f51611aec
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2858194
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2023-02-18 02:36:54 -08:00
Hareesh Kesireddy
086e4f09fc osi: l3l4: disable IPFE when wildcard enabled 
- Having IPFE set causes MAC to drop all packets which
  do not match with configured l3l4 filters. Hence
  disable IPFE related code using a compile switch.

Bug 3576506

Change-Id: Ibf6c0e724141c9f7dc16a41de476057fc8eb7835
Signed-off-by: Hareesh Kesireddy <hkesireddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2834367
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2023-02-17 07:20:42 -08:00
Narayan Reddy
3fff0cd9ba osi: core: fix Doxygen warnings 
1) Fix Doxygen warnings
2) include debug.h code only when OSI_DEBUG
is defined

JIRA NET-570

Change-Id: I5d002b959925bec3898cc2faafe3f506b3c9bd22
Signed-off-by: Narayan Reddy<narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2847327
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2023-02-04 16:49:50 -08:00
Rakesh Goyal
d2bb5de0f5 osi: core: update boundary for lo and hi credit 
As per HW specification update boundary check
for locredit and hicredit.

Bug 3927833

Change-Id: I3b6efeba52a7c40d3f4d276dea50e95310011d5f
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2837043
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-01-06 22:36:42 -08:00
Rakesh Goyal
6a8f317407 osi: core: validate input argument 
Validate input argument for exported
data structures

Bug 3789594

Change-Id: Ib16ace8cc933fcfce635f82ad0c89dc5791c999b
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2827045
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-12-16 03:33:19 -08:00
Mohan Thadikamalla
3db08e6480 osi: hsi: Add return code for HSI Error injection 
Issue:
HSI error injection IOCTL does
not return failure on invalid
error codes.

Fix:
Handle invalid HSI error codes
for HSI error injection IOCTL.

Bug 3806923

Change-Id: I317b15e9a3ac98ab3d8d5c3ab37dd6782760bec3
Signed-off-by: Mohan Thadikamalla <mohant@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2823800
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-12-12 15:09:49 -08:00
Narayan Reddy
d1e320cc82 osi: core: fix CERT INT31-C 
Bug 3745813

Change-Id: I7d686c45ae5e74f3bfc3c4e6642fc38ee312d6a1
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2821888
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-12-08 00:13:26 -08:00
Hareesh Kesireddy
6f0c3604d0 osi: l3l4: split perfect inv bit for each field 
- HW has separate Inverse Match bits in l3l4 control register for each
  source address, destination address, source port and destination port.
- Hence, added separate Inverse match bits for all the 4 fields in
  osi l3l4 structure to provide flexibility for l3l4 users.
- Fixed validation parameter sequence to validate l3l4 parameters
  before processing filter data.

Bug 3576506
Bug 3825731

Change-Id: Id7f8939acd92ad5799f2ad0d7cef5d4fcb7e00c5
Signed-off-by: Hareesh Kesireddy <hkesireddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2820517
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-12-05 20:44:28 -08:00
Hareesh Kesireddy
3be2a1e7f3 osi: l3l4: support four tuple for l3l4 fitlers 
Following implemented for non safety.
- Moved l3l4 filter index assignment to OSI for better management.
  OSDs need not worry about managing l3l4 filter indexes.
- Restructured code to support four tuple for osi l3 l4 filter.
- Added a wildcard l3l4 filter at highest filter index to allow the
  the packets to receive on default dma channel (from l2 filter) for the
  packets which do not match with any of the configured l3 l4 filters.
- For IPv4, allowed user to configure all SA+DA+SP+DP together at a
  single l3l4 filter index or user can selectively add any
  combination among them (e.g, only SA or SP+DA, etc.).
- For IPV6, only restriction is to add either of the SA or DA only
  but not both at a time at a single l3l4 index.

Bug 3576506
Bug 3825731

Change-Id: I20bd197f5bf793a77f5e723d1875875d442af66e
Signed-off-by: Hareesh Kesireddy <hkesireddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2802626
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-11-30 06:16:47 -08:00
Narayan Reddy
67ffdc1d3c osi: core: merge ioctl calls to osi_core_init 
By default enable below settings during core init,
so that we can avoid the same by calling from Guest OS

1) bring mac out of reset
2) forward error packets
3) set mode to full duplex
4) enable rx csum
5) Configure PTP
6) start mac

Bug 3701869

Change-Id: I26578b7a0b8c91c4880d9ef6a3a171ab1c1945aa
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2809705
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-11-23 08:06:55 -08:00
Sanath Kumar Gampa
a8387466cd osi:core: Address review comments on HSI changes 
Bug 3590939
Change-Id: Id54b61871d5152c58376781c421077c62174bc2f
Signed-off-by: Sanath Kumar Gampa <sgampa@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2801135
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-11-09 11:19:09 -08:00
Om Prakash Singh
70bf517f34 osi: core: add support for HSI error injection 
Add new osi ioctl command OSI_CMD_HSI_INJECT_ERR for
IP specific error injection configuration.
different type of error is injected based on input
error code value.

Bug 3806923
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Change-Id: I01269d211293aa67471fadcf6e349f049f9c1a51
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2786840
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-11-09 11:18:59 -08:00
Om Prakash Singh
b35c75e1db osi: core: add SW error code for XPCS write failure 
As return specific error code on PCS read-after-write fails.
And add SW error code to report for FSI on failure.

Bug 3792855

Change-Id: I51b8a088247d98621750af7bb42100a078c083c2
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2781195
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-11-09 11:18:39 -08:00
Narayan Reddy
81242cd874 osi: core: Fix misc optimizations 
1) remove duplicate checks
2) remove unused APIs
3) moved to STRIPPED if not used

Bug 3701869

Change-Id: Id6ba8649ff5135affa949ea8dde947db10003f80
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2784309
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-11-04 16:17:25 -07:00
Narayan Reddy
4c85b5e49e osi: core: Fix MISRA issues 
===== DIFF ======
Total misra violation count changed by -71
Rule: MISRA_C-2012_Directive_4.5 Diff: -3
Rule: MISRA_C-2012_Rule_11.1 Diff: -5
Rule: MISRA_C-2012_Rule_11.3 Diff: -1
Rule: MISRA_C-2012_Rule_11.5 Diff: 1
Rule: MISRA_C-2012_Rule_12.1 Diff: -6
Rule: MISRA_C-2012_Rule_12.2 Diff: -7
Rule: MISRA_C-2012_Rule_15.1 Diff: -1
Rule: MISRA_C-2012_Rule_15.6 Diff: -1
Rule: MISRA_C-2012_Rule_16.1 Diff: -1
Rule: MISRA_C-2012_Rule_16.3 Diff: -1
Rule: MISRA_C-2012_Rule_17.7 Diff: -4
Rule: MISRA_C-2012_Rule_17.8 Diff: -5
Rule: MISRA_C-2012_Rule_2.4 Diff: -4
Rule: MISRA_C-2012_Rule_2.5 Diff: -18
Rule: MISRA_C-2012_Rule_20.5 Diff: -1
Rule: MISRA_C-2012_Rule_5.6 Diff: -1
Rule: MISRA_C-2012_Rule_5.8 Diff: -1
Rule: MISRA_C-2012_Rule_5.9 Diff: -4
Rule: MISRA_C-2012_Rule_8.3 Diff: -2
Rule: MISRA_C-2012_Rule_8.9 Diff: -5
Rule: MISRA_C-2012_Rule_9.5 Diff: -1
Rule: Total Diff: -71

Bug 3695218

Change-Id: I9bd904f8a77195ca34fb2d47639a214f0083ccf7
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2776281
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-09-29 19:38:37 -07:00
Narayan Reddy
5750d03d79 osi: core: Fix CERT/CERT ADV/Coverity issues 
**CERT report**
===== DIFF ======
Total cert violation count changed by -34
Rule: CERT_INT30-C Diff: -22
Rule: CERT_INT31-C Diff: -2
Rule: CERT_INT32-C Diff: -10
Rule: Total Diff: -34
**CERT ADV report**
===== DIFF ======
Total cert_adv violation count changed by -13
Rule: CERT_DCL37-C Diff: 1
Rule: CERT_EXP39-C Diff: -13
Rule: CERT_INT34-C Diff: -1
Rule: Total Diff: -13
**Coverity report**
===== DIFF ======
Total coverity violation count changed by -1
Rule: UNUSED_VALUE Diff: -1
Rule: Total Diff: -1

undef DRIFT_CAL since no longer used

Bug 3695218

Change-Id: I6638e2954ec2a74a66a756713b389610534d207a
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2776244
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-09-26 16:09:10 -07:00
Rakesh Goyal
6b4ddb8043 nvethernetrm: take exported ioctl related header out 
Issue: SW needs to support IOCTL on safety builds and
these header should be exposed to user

Fix: Create new header file which is exposed externally
     Fix Coverity issues
     Enable TSN and FRP for safety build
     Optimize the code between eqos and mgbe

Bug 3704251

Change-Id: I2807f8283a296de1f96d3f902cb4ad5a4781be50
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2759333
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
 2022-09-12 20:52:00 -07:00
Narayan Reddy
e03254a23d osi: core: combine config_l3_l4_filter_enable 
Bug 3701869

Change-Id: Ic36cb61075495589c9aaf9bafb7ce1eeda4de673
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2740674
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-09-08 21:02:01 -07:00
Narayan Reddy
d3bd103871 osi: core: combine config_mac_pkt_filter_reg 
Bug 3701869

Change-Id: I603bd57511f115fb5af42dca2a5804cf4926ebbb
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2740658
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-09-08 21:01:51 -07:00
Narayan Reddy
02e8ac20c5 osi: core: combine ptp_tsc_capture 
Bug 3701869

Change-Id: Ib8b2ea895866e2d260aa5e5aa753ecfd49b663ae
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2740494
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-08-25 19:06:59 -07:00
Narayan Reddy
cc6c76912d osi: core: combine config_ssir 
1) Combine config_ssir
2) Store MAC version in local core/dma variable for differentiating across SoCs.

Bug 3701869

Change-Id: I43dd9f7d2194191d849ea10f15b84b2c40111ee0
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2740328
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-08-25 19:06:47 -07:00
Narayan Reddy
f20eda41e2 osi: core: combine config_tscr 
Bug 3701869

Change-Id: I1eb04dd9cf439ce55b1bdc6df73f793af85eddcd
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2740317
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-08-25 19:06:41 -07:00
Narayan Reddy
cc9c350697 osi: core: combine config_addend 
Bug 3701869

Change-Id: I6a656ac72e8d87b96ac9efa9bf9e1c9a979306b1
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2740109
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-08-25 19:06:34 -07:00
Narayan Reddy
3b34cf8978 osi: core: combine set_systime_to_mac 
Bug 3701869

Change-Id: I7df8c486b9fea489bf16c700d93e070f0d455dd2
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2740056
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-08-25 19:06:27 -07:00
Bhadram Varka
8592447094 osi: Pass OSD pointer for better logging 
Issue: Currently logs don't have any IP/inteface specific
name to indicate that from which IP/interface these
logs are coming.

Fix: Pass OSD pointer so that interface or device name
can be added to the logs.

Reduce XPCS logging

Bug 3719492
Bug 3722532

Change-Id: Id909b14f24f441ab40ff6497f1998aeb4ab34611
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2745731
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-08-20 23:31:07 -07:00
Narayan Reddy
f971d40513 osi: core: skip out not required code for Safety QNX 
Bug 3701869

Change-Id: Ic1f676708ff6e3faf7dbed09f0e7048448252e57
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2739627
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Bhadram Varka <vbhadram@nvidia.com>
 2022-08-06 05:04:15 -07:00
Narayan Reddy
071fe395fd osi: core: combine config_rxcsum_offload 
Bug 3701869

Change-Id: I802497b6f973c69b994373697251964e532243f7
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2739139
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-07-13 16:28:25 -07:00
Narayan Reddy
be51977e02 osi: core: combine config_fw_err_pkts 
Bug 3701869

Change-Id: I5a0fe6e24d8aa69054a18f927d7135552482e8b9
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2739131
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-07-13 16:28:15 -07:00
Narayan Reddy
46f06fed42 osi: core: combine flush_mtl_tx_queue 
Bug 3701869

Change-Id: Ifea025c0eb2d4373a348283aaa93eb7d0eca193a
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2739121
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-07-13 16:28:04 -07:00
Narayan Reddy
16934a83e6 osi: core: combine set_speed 
Bug 3701869

Change-Id: Ie41b31e94f0ec0fb0b8d2d52cca7fafa81fd54c2
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2738062
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-07-13 16:27:54 -07:00
Narayan Reddy
9ada234fa2 osi: core: combine set_mode 
Bug 3701869

Change-Id: I01d8e45b5818277441775d17e332c246ffa13a0e
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2738021
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2022-07-13 16:27:44 -07:00
Narayan Reddy
e6698c799b osi: core: combine stop_mac 
Bug 3701869

Change-Id: I27a16c3f7c088be815b36d416ae068b5e60db143
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2738006
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2022-07-13 16:27:40 -07:00
Narayan Reddy
948eb47379 osi: core: combine start_mac 
Bug 3701869

Change-Id: Ice5ea78f32da1641cc847138869df97149eb72c9
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2737988
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2022-07-13 16:27:35 -07:00
Bhadram Varka
dea34fa933 osi: core: common poll_for_swr 
Combine MGBE/EQOS HW level functions into single function.

Bug 3701869

Change-Id: I02c4881ec95cc5637867d68e560f4790c3548737
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2732106
Reviewed-by: Krishna Thota <kthota@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2022-07-13 16:27:31 -07:00
Rakesh Goyal
288c525a36 nvethenetrm: core: SW WAR implementation for switching of Gates 
Issue: switching of Gates did not happen for
intermediate cycles when CTR is
less than GCL execution time

Fix: SW WAR as per recommendation.
1) At the programming time make sure
  (CTR - total TI) should be 0 or more than
  8PTP clock time.
2) Switching to New List
   check for following
   Old BTR + n(CTR) - New GCL list's BTR >= 8PTP or
   New GCL list's BTR – (Old BTR + n(CTR)) >= 8PTP

Bug 200724911

Change-Id: I19127a134655a66bb66d025f964b85afc6c23c2e
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2622942
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-02-28 10:49:29 -08:00