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161 Commits

Author SHA1 Message Date
mohant
88f37dcfd5 nvethernetrm: Add PTP offload support 
Bug 200562286

Change-Id: I7adf08da12458c7291391ef726fe1fa65cb1bda1
Signed-off-by: Mohan Thadikamalla <mohant@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2319556
Tested-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
 2021-06-21 07:07:10 +05:30
Mohan Thadikamalla
b3ff3bb215 nvethernetrm: Add Flexible Receive Parser support 
- Define new data structure for the FRP table entry,
declare new frp_table and NVE variables in the OSI
core private structure.
- Define a new data structure for the OSI FRP command.
Add new OSI API to initiate FRP commands from OSD.

Bug 200565623

Change-Id: I84660a6e8270a681b82236d0c39423660b3821ff
Signed-off-by: Mohan Thadikamalla <mohant@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2330182
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
 2021-04-05 16:35:54 +05:30
rakesh goyal
aa89068135 nvethernetrm: eqos: TSN support for EQOS IP 
1. Adds basic OSI API's for EST/FPE
2. EST/FPE support for EQOS
3. MMC counters for FPE
4. EST errors and state counter

Bug 200561100

Change-Id: Iee3e6caac5d16e1620c25420d72700f9cdd00465
Signed-off-by: rakesh goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2319820
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
 2021-04-05 16:35:54 +05:30
Rakesh Goyal
36c1924486 nvethernetrm: mgbe: add PTP support 
Change takes care of -
o Enable PTP for MGBE
o Added flags for One step/two step and also
for PTP master/slave
o Getting timestamp from MAC registers for MGBE.

Bug 200565914

Change-Id: I17346451f2619f0526a737a4a6bffdf130af4fc0
Signed-off-by: rakesh goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2314201
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
 2021-04-05 16:35:54 +05:30
Narayan Reddy
183e87c1f8 nvethernetrm: mgbe: add flow control support 
Add flow control support for MGBE.

Bug 200565905

Change-Id: I4edb82225cfd60fcff47d0aef11b516d9960961a
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2278454
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
 2021-04-05 16:35:54 +05:30
Bhadram Varka
5378fecdbc nvethernetrm: mgbe/eqos: Add support for VLAN 
Adds support for VLAN insertion/deletion and filtering
on receive side.

Perfect filtering enabled for the VLAN filtering.
HW maximum has 32 VLAN perfect filters. If user adds
more than 32 then all VID's will be allowed

Bug 200565888

Change-Id: I75bdc261a77df4f9d9f5fff9a2943731de9dd4ef
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2312144
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
 2021-04-05 16:35:54 +05:30
Mohan Thadikamalla
ccaf2f4096 nvethernetrm: mgbe: Add L3 and L4 filtering 
Add L3 IP address filtering support and
L4 port filtering support

Bug 200565909

Change-Id: I31748cfacf41bb6358813b80eabb57dd6416da5c
Signed-off-by: Mohan Thadikamalla <mohant@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2274443
 2021-04-05 16:35:54 +05:30
Mohan Thadikamalla
46c9d4800c nvethernetrm: mgbe: Add DA/SA/MC/BC filtering 
Add support for DA/SA/MC/BC L2 address filtering.
Enable MCBC queue, and set queue1 for MCBC queue.

Bug 200565909

Change-Id: I79c2608d1f878695eb8f9c8c3c836c1d458095a0
Signed-off-by: Mohan Thadikamalla <mohant@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2274442
 2021-04-05 16:35:54 +05:30
Bhadram Varka
731abcdc1e nvethernetrm: add support for MGBE initialization 
Adds MAC CORE and DMA initialization support for
MGBE MAC Controller.

Bug 200548572

Change-Id: I6796229852b47ff0748a848a6dbe9addab6ab74f
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2250401
 2021-04-05 16:35:53 +05:30
rakesh goyal
3d7a7a2661 osi: eqos: only interface APIs accessible form OSD 
Issue:	Many non API functions are accessible from
	OSD code which can be used to update/access
	HW registers.
Fix:	Move non API function to local files and
	remove header files from code shared with OSD
	so these function can be accessible only
	within OSI code

Bug 200671160

Change-Id: Ic396b3b34e20cd8ee6b252e745df12f4532d0e10
Signed-off-by: rakesh goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2494297
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2021-03-11 22:28:24 -08:00
rakesh goyal
93d87716de core: move get_hw_feat to osi_core 
No api from osi_common should be direclty accessible
from OSD code. moving osi_get_hw_feat to osi core.

Moving following API to common/common.h
osi_memset()
osi_memcpy()

Bug 200671160

Change-Id: Idd6269b01ee8ec21c7f3c5b7f3376cf9a91bb661
Signed-off-by: rakesh goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2488875
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2021-03-05 19:35:28 -08:00
nannaiah
65a65797bb nvthernetrm: Add IVC support for OSI 
In case of virtualization the OSI functions will be handled
at Ethernet Server. Add IVC support where OSD can send
IVC packets to ethernet server. Ethernet Server parses the
messages and calls the corresponding OSI API.

OSI and few DMA API's are updated to support osi_core as an
argument.

Bug 2694285

Change-Id: Ic56b8e9f5f9cd70cc70239b61d756bfa2e998588
Signed-off-by: Nagaraj Annaiah <nannaiah@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2435281
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-18 20:05:20 -08:00
rakesh goyal
7a1419d26e osi: core: dma: fix issue identified in unit testing 
Issue:
- rx_ring pointer validation missing in interface API
- Misra-C issue introduced while fixing
  Advisory error.
- if addend = diff, osi_adjut_freq return -1
- OSI_MAC_TCR_SNAPTYPSEL_3 unused macro

Fix:
- add check for rx_ring pointer validation
- Fix Misra C error
- proceed further instead of returning -1
- Hide OSI_MAC_TCR_SNAPTYPSEL_3 for QNX

Bug 200686220

Change-Id: I806b4f33b86ee08c96ddb76fbfb91bf394206d70
Signed-off-by: rakesh goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2459580
(cherry picked from commit fabc231aa387a74158b6efe926659c33c1abf0c6)
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2460837
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-18 15:25:54 -08:00
Narayan Reddy
8a2198ab54 osi: common: change eqos MAC version to 0x53 
Bug 200681386

Change-Id: I034e8bde53a957916113812adc937ae3f0dc5825
Signed-off-by: narayanr <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2454879
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-14 06:35:33 -08:00
rakesh goyal
56b160f12e nvethernetrm: fix review CG and DG comments 
- Include header gaurds using INCLUDED_
- Move static inline function to private
  header file.
- Move private macro to private header

Bug 200681427

Change-Id: I810184e077a5642f727e47b9280d3fb9659abd74
Signed-off-by: rakesh goyal <rgoyal@nvidia.com>>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2455014
(cherry picked from commit b3afc7a112460d7f92d8ef0fbe8727c7acd9ec44)
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2457307
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-10 14:52:50 -08:00
rakesh goyal
670622893f nvethernetrm: fix Misra-C 2.x, 5.9 and 8.9 
Fix MISRA C-2012 Rule 2.3
Fix MISRA C-2012 Rule 2.4
Fix MISRA C-2012 Rule 2.5
Fix MISRA C-2012 Rule 5.9
Fix MISRA C-2012 Rule 8.9

Bug 200682334

Change-Id: Ie95e2f9d346d952fac1cf28f241522f35648be38
Signed-off-by: rakesh goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2455622
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2457306
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-10 14:52:46 -08:00
rakesh goyal
a744271813 nvethernetrm: fix for Misra-C 4.6 
- Fix Misra-C Rule 4.6

Bug 200682334

Change-Id: I56b1effa4e1a2f0707a26d11358de60d9d12e4f9
Signed-off-by: rakesh goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2453789
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2457303
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-10 14:52:33 -08:00
rakesh goyal
d889b272e1 osi: update API group 
Issue: Need to add "API Group" for all APIs.

Fix: Add "API Group" to all APIs

Bug 200681427

Change-Id: Iea2a77943c61dc166dd885f556454c63e4f6c716
Signed-off-by: rakesh goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2453124
(cherry picked from commit b914e618d1ee70b92d60314f7614b20c34772fbc)
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2455386
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-07 11:15:45 -08:00
rakesh goyal
0651a8f39a core: move API form common/ to core/ 
Issue: As per unit design following APIs are
part of NvEthernetRm but in current implementation
is it getting compile with NvEthernetCl also
- osi_get_mac_version()
- osi_get_hw_features()

Fix: move APIs to NvEthernetRm

Bug 200669603

Change-Id: I27f5f304a586f40693d700e9bdb40b553d591544
Signed-off-by: rakesh goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2435473
(cherry picked from commit 2d74a69dd1fd0c2567a506ae0f8e797924650e28)
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2448708
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-07 11:15:29 -08:00
Nagarjuna Kristam
4140d173ce osi: replace osd_* API with osd_ops callbacks 
Issue:
OSI calls OSD functionality using a direct API callback.
When multiple OSD's are present in single build system, only one
OSD can be linked to OSI for OSD functionality.

Fix:
Replace direct osd_* API calls by registered osd_ops callback.

Bug 200620687

Change-Id: I967565286fd9334fea6b34436267649f1af671c0
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2419132
(cherry picked from commit 0340c55df5741f73717e7a97e937bc4fdd6f02ef)
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2438837
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-11-03 07:45:24 -08:00
rakesh goyal
cb802ae56f osi: create stripped library for MCAL/QNX 
Update common library to export only API
used in QNX/MCAL driver if OSI_STRIPPED_LIB
is defined.

Bug 200671362

Change-Id: Ide3a5d9a60228b5d07355b58e26f509245db4144
Signed-off-by: rakesh goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2410877
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2422285
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Mahesh Patil <maheshp@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-10-28 18:05:43 +05:30
Nagarjuna Kristam
c09ce43167 osi: update function headers 
Update doxygen comments for functions with below info
 - Use Algorithm inside @note
 - All numberical usages(like 1),2)..) with '-'
 - Add API group, Classification and Traceability note sections
   for all external interface functions.

Bug 200671362

Change-Id: I762df388659f4be75952b7050c7ae03489a086b8
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2407423
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2422284
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Mahesh Patil <maheshp@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: Rakesh Goyal <rgoyal@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-10-28 18:05:43 +05:30
rakesh goyal
931fa3332b nvethernetrm: eqos: handle filter operation flag 
Issue:	RM server is not aware of what L2 address
	should be removed from local list and register as
	index passed by OSD/OSI_Core may mis-match in case
	multi FD instance usecase.
Fix:	As RM server finds index/offset on its own corresponding
	to MAC address, Core software should reset AE bit and pass
        other user provided argument as it is. Legacy
	way of removing L2 address is still supported.

Bug 200626200

Change-Id: I43919827422d176334198ee09e822047b606da79
Signed-off-by: rakesh goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2359969
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-06-19 00:56:04 -07:00
rakesh goyal
65c54ac537 nvethernetrm: osi private structure update 
update OSI HW feature registers

Bug 200563382

Change-Id: Ia30176bcf9dc1080489caa52bd0c67ac05a17ef1
Signed-off-by: rakesh goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2338042
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-05-22 14:23:12 -07:00
Bhadram Varka
e50045cc5a nvethernetrm: add support for EQOS VM interrupts 
Adds VM IRQ handling support at OSI layer and adds
corresponding support for EQOS as well.

Need to pass below parameters from DT -
o Number of VM IRQ's assigned per OS/VM.
o Number of VM channels assigned to a VM IRQ.
o List of DMA channels assigned to a VM IRQ.

Below is the sample DT representation -

vm_irq_config: vm-irq-config {
	nvidia,num-vm-irqs = <4>;
	vm_irq1 {
		nvidia,num-vm-channels = <2>;
		nvidia,vm-channels = <0 1>;
	};
	vm_irq2 {
		nvidia,num-vm-channels = <2>;
		nvidia,vm-channels = <2 3>;
	};
	vm_irq3 {
		nvidia,num-vm-channels = <2>;
		nvidia,vm-channels = <4 5>;
	};
	vm_irq4 {
		nvidia,num-vm-channels = <2>;
		nvidia,vm-channels = <6 7>;
	};
};

ethernet@<base_addr> {
	[...]
	nvidia,vm-irq-config = <&vm_irq_config>;
	[...]
}

Bug 200546379

Change-Id: Id20780d573aa70baf42b003728ba416ed61832d2
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2250403
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2198595
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-05-06 23:44:13 -07:00
rakesh goyal
6369d3b081 nvethernetrm: add osi_likely() and osi_unlikely() 
Adding osi_unlikely and osi_likely using compiler
built-in macros which give compiler hints for branch
prediction.

Bug 200599872

Change-Id: I64be9a53285bdc11015a2efb565e2addac531c5c
Signed-off-by: rakesh goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2318771
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-04-16 08:05:27 -07:00
Mohan Thadikamalla
bd8edd0ae4 Revert "nvethernetrm: move core_backup to osi_common.h" 
Reverting this change to support IP based
indirect addressing registers save and restore.

Bug 200596517
Bug 2804631

This reverts commit 962ca78215.

Change-Id: Ia6ec230243cfb58a64e4f9fc4dbb9e3079a58cae
Signed-off-by: Mohan Thadikamalla <mohant@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2315794
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GVS: Gerrit_Virtual_Submit
 2020-03-23 03:04:28 -07:00
Mahesh Patil
1c179c837f nvethernetrm: Program LPI 1us tic counter register 
Issue: In GVS farm, SSH logging fails randomly
       after enabling EEE feature

Fix: Program LPI 1usec tic counter register with correct
     APB clock(clk_pclk) frequency as per databook requirement.

Bug 2813867
Bug 2850086

Change-Id: Ice2e130a808e763841945cb7a2d4e3552ee31498
Signed-off-by: Mahesh Patil <maheshp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2300343
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Reviewed-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
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GVS: Gerrit_Virtual_Submit
 2020-03-17 13:57:06 -07:00
narayanr
46c199bcae nvethernetrm: drop rx packets longer than current MTU 
Issue: When JE is set, HW will accept any valid packet on Rx
upto 9K or 16K (depending on GPSCLE bit), irrespective of
whether MTU set is lower than these specific values. When
Rx buf len is allocated to be exactly same as MTU, HW will
consume more than 1 Rx desc to place the larger packet.

Fix: Drop Rx packets which are longer than currently set
MTU since HW cannot drop them.

Bug 2870545
Signed-off-by: narayanr <narayanr@nvidia.com>

Change-Id: I869f4858f8d2b502a3965dc2ca40cda8805f9886
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2308379
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 2020-03-09 12:10:51 -07:00
narayanr
7c46ee875f nveternetrm: fix doxygen comments 
Bug 2804631
Bug 2804169
Bug 200561709

Change-Id: I6d61c8b8a911ae3847049c534e6d19e0aec65209
Signed-off-by: narayanr <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2306568
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GVS: Gerrit_Virtual_Submit
 2020-03-04 12:19:32 -08:00
narayanr
27d9ad8b7a nvethernetrm: enable GPSLCE 
Enable Gaint Packet Size Limit Control when
MTU size is greater than 9000

Bug 200512422

Change-Id: I458b561298760cbb4945195a86daed43ba69d1c6
Signed-off-by: narayanr <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2303736
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GVS: Gerrit_Virtual_Submit
 2020-03-02 10:33:56 -08:00
Mahesh Patil
962ca78215 nvethernetrm: move core_backup to osi_common.h 
Issue: RFE: move struct core_backup to osi_common.h
Fix:
 1. Moved core_backup to osi_common.h
 2. Added generic osi_mac_restore_registers() and osi_mac_save_registers()
    Api's in osi_common.c
Bug 2804631

Change-Id: I5bc71666e104f2e729024e096bd51ce350f2a1f0
Signed-off-by: Mahesh Patil <maheshp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2286642
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Reviewed-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
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GVS: Gerrit_Virtual_Submit
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 2020-02-13 21:19:46 -08:00
Srinivas Ramachandran
a72703ec43 nvethernetrm: Add API to backup/restore registers 
Issue: During SOC suspend, the MAC is placed in reset.
       This causes all dynamic configurations done by
       SW on the MAC core registers is lost. When SOC
       resumes, MAC is initialized to power-on-default
       configuration, while other SW components still
       have previously set configuration. This results
       in mismatch between HW/SW configuration.
Fix:   Add APIs osi_save_registers(), osi_restore_registers()
       to backup and restore the MAC core configuration
       registers before suspend and after resume respectively.

Bug 200561046

Change-Id: I6d7b39d39a6f3fa882cfd905bc49a5850163ea4c
Signed-off-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2267390
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Tested-by: Narayan Reddy <narayanr@nvidia.com>
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Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
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Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
GVS: Gerrit_Virtual_Submit
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 2020-01-10 07:10:43 -08:00
Srinivas Ramachandran
1b011027d7 nvethernetrm: Add support for EEE LPI 
Add an API to configure the EEE LPI mode.
Tx LPI is enabled with a default entry time of 1sec.
The MAC controller has capability to automatically
enter LPI mode when all transmissions are complete.

Bug 2594864

Change-Id: I765ddfda908b1922abd46c11fa217a35fe6190f1
Signed-off-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2160787
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 2019-12-11 22:53:37 -08:00
Ajay Gupta
0ea2fd047e nvethernetrm: enable tx interrupt coalescing 
Tx frame count and software timer based interrupt coalescing
is enabled. Tx frame based coalescing can be enabled only
when tx software timer based interrupt coalescing is also
enabled.

Bug 200529168

Change-Id: Icd5e2ff3a6b9ad1d1793842b607a93ad779955d7
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2234609
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-12-05 13:13:39 -08:00
Ajay Gupta
a690e68bc4 nvethernetrm: enable rx frame based interrupt coalescing 
Rx frame based coalescing can be enabled only when
Rx timer based coalescing is also enabled. This is to avoid
no rx interrupt issue for applications which send only limited
frames and expects reply.

Bug 200529168

Change-Id: If20ec8322d6597f0a018c5668a9d632e456f60cd
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2233501
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
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GVS: Gerrit_Virtual_Submit
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
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 2019-12-05 13:13:15 -08:00
Ajay Gupta
86cdd25195 nvethernetrm: fix AXI clock to 125MHz 
Fixes incorrect number of rx interrupt triggered with
rx coalescing (rx-usecs in ethtool) parameter.

Bug 200529168

Change-Id: I49ea2c469667e05f7e12f2741984f609127f395c
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2229564
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
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 2019-12-05 13:13:05 -08:00
Narayan Reddy
fab3043f1c nvethernetrm: change required clock freq to 250MHz 
increase required clock frequency from 62.5MHz to 250MHz
for better PTP time stamping accuracy.Switching to 250 MHz
will increase the accuracy of the PTP timestamp by ~22ns

Bug 200565215

Change-Id: I1dab385ade30df4864c1477685f39d4374700932
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2234039
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2019-11-14 22:24:03 -08:00
Mohan Thadikamalla
8c4a5092ee nvethernetrm: Add slot function support 
Issue:
Data packets sent via EQOS hardware are not
following any packet gaping. The AVB use-cases
have different timing requirements for class A
data packets. For example, the time difference
between two class A data packets are supposed
to be 125 microseconds for audio data of
frequency 48 kHz.

Fix:
Add slot function support to schedule
the data fetching from the system memory
by the DMA. This will help the AVB SW stack
timing requirements for class A data.

Bug 200545374

Change-Id: Id7c606f7491a423051667811bd6d459ee58f6700
Signed-off-by: Mohan Thadikamalla <mohant@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2222282
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
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Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
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 2019-11-11 15:16:00 -08:00
Rakesh Goyal
f5417e6937 nvethernetrm: eqos: Use single API to enable/configure filter 
Configuring L3/L4 filter: osi_l3l4_filter() shall be called

Configuring L2 filter: osi_l2_filter() shall be called

Bug 2715384

Change-Id: Id5598b43a3723de4535b5595e019f6fced6c56ab
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2216068
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-10-30 16:23:19 -07:00
Mohan Thadikamalla
a87f95eac4 nvethernet: Remove variable args API's for MISRA 
Issue:
Variable arguments not allowed in misra/certc.

Fix:
Remove variable arguments API's and add
fixed arguments API

Bug 200553611

Change-Id: I5566683a01e1e65654c25f779ea96f68d9de8555
Signed-off-by: Mohan Thadikamalla <mohant@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2214093
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-10-16 00:35:33 -07:00
Mohan Thadikamalla
43c020c435 nvethernetrm: Fix MISRA violation with ULONG_MAX 
Issues:
Observed MISRA Rule 14.3 violations due to
ULONG_MAX comparison.

Fix:
Redesign this code by removing the ULONG_MAX
comparison logic and handle CERT-C
wrap violations.

Bug 200544430

Change-Id: I05e0dc03356ae19a0dcb895d35ef679f96575ac0
Signed-off-by: Mohan Thadikamalla <mohant@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2206001
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
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Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-10-08 23:14:01 -07:00
Mohan Thadikamalla
89298884cd Fix CERT-C errors INT30-C, INT31-C, INT32-C 
Issue:
Observed 177 CERT issue:
CERT INT30-C	158
CERT INT31-C	17
CERT INT32-C	1
CERT INT33-C	1

Fix:
Fix existing defects for above cert-C errors as per
recommended practices.

Bug 200546468
Bug 200512422

Change-Id: I54d6ee35566da1985f2aea83d8c4b10f71309fed
Signed-off-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Signed-off-by: Mohan Thadikamalla <mohant@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2123080
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-09-11 09:12:55 -07:00
Narayan Reddy
77b827e51b nvethernetrm: Update comments with Doxygen style 
replace kernel doc comments with Doxygen style comments

Bug 200512422

Change-Id: I2e8e1f395674ab9e1b66bf40c1f6cc0551608163
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2154252
GVS: Gerrit_Virtual_Submit
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-08-21 13:06:08 -07:00
Srinivas Ramachandran
0082517f74 nvethernetrm: Implement external safety mechanism 
EQoS MAC version < 5.10 is not safety certified. To ensure
some basic error handling situations, implement external
error handling mechanism in the driver to periodically
read and verify the current register content for certain
critical registers, against the last written value.

Bug 2594911

Change-Id: I1d7c01f89ad838ffe3ab1efd15126640ae9df775
Signed-off-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2136607
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2019-07-30 23:16:59 -07:00
Mohit Dhingra
7326499950 nvethernetrm: fix macro name 
ESQC-9844

Change-Id: If0b0311962c2bf0b676aa464aed44183dabc058f
Signed-off-by: Mohit Dhingra <mdhingra@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2152300
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-07-14 22:09:55 -07:00
Narayan Reddy
2c49e330d5 nvethernetrm: add support for RIWT 
This support enables the configuration of Receive Interrupt
Watchdog Timer register which indicates the watchdog timeout for
Receive Interrupt (RI) from the DMA.

Bug 200512422
Bug 2624476

Change-Id: I66830a47c34845af06e318ba6069935d51d15af8
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2138153
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-24 02:46:22 -07:00
Rakesh Goyal
f892918696 nvethernetrm: add L2/L3/L4 filter based dma routing code 
With this feature filtered Rx packet will be redirect to
corresponding DMA channel based on register configuration.

Function driver code need to pass 2 extra parameters enable/disable
and dma channel number within the valid range to utilize this
functionality.

For L2 filtering, function driver code can also pass address mask
and src_dest for filter index 1-31.

Bug 200525721

Change-Id: Ibf3fb93cdd4c3b7c0384a0e36e7bbe467bb41e04
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2133197
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-18 01:36:43 -07:00
Rakesh Goyal
b63e4f033b nvethernetrm: add HW and SW counters' support 
These stats are read from MAC HW RMON counters as well as from Core
and DMA path.

ethtool -S <interface> is used to get statistics.

There are 3 stats captured currently
1) ether_mmc_counters: EQOS HW RMON counters
2) ether_xtra_stat_counters: SW counters from osi/core
3) ether_xtra_dma_stat_counters: SW counters from osi/dma

Bug 200519211

Change-Id: I5bbeb340cf2ffccb6399687b254f79c67f480179
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2114208
GVS: Gerrit_Virtual_Submit
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-15 23:55:22 -07:00
Narayan Reddy
efb739e01c nvethernetrm: add PTP support 
This takes care of implementing the PTP support
which includes PTP V1/V2 over IPV4,IPV6,Ethernet,gPTP.

Bug 200524751

Change-Id: Ieb680d818be81c1a1a8349ddd9ff02bba1896b08
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2127117
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 23:58:04 -07:00