Issue: RWT and RWUT programmed for uFPGA Fix: Update RWIT programming Update minimum rx coalescing timer value Bug 200767374 Change-Id: I09c21764f0c294021c7546f75351c19c34a0b9db Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2589496 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: Bhadram Varka <vbhadram@nvidia.com> Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit