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6f0c3604d0
- HW has separate Inverse Match bits in l3l4 control register for each source address, destination address, source port and destination port. - Hence, added separate Inverse match bits for all the 4 fields in osi l3l4 structure to provide flexibility for l3l4 users. - Fixed validation parameter sequence to validate l3l4 parameters before processing filter data. Bug 3576506 Bug 3825731 Change-Id: Id7f8939acd92ad5799f2ad0d7cef5d4fcb7e00c5 Signed-off-by: Hareesh Kesireddy <hkesireddy@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2820517 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>