nvethernetrm

mirror of git://nv-tegra.nvidia.com/kernel/nvethernetrm.git synced 2025-12-22 09:12:10 +03:00

Bibhay Ranjan 7d5ed69635 osi: core: add support to program phy registers

This new function will be called from the dt
parsing and loading the phy based configuration
at different states of phy.
The API works transparent to the phy and hence
requires register programming directly instead
irrespective of direct/indirect addressing.

for eg. if a read needs 2 register access using
indirect addressing, both the reads have to be
done by dt.

Bug 4912541

Change-Id: Idadd6ddef7b6251511d1ce2f6bfa6d482e8d5e94
Signed-off-by: Bibhay Ranjan <bibhayr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/3264576
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Narayana Reddy P <narayanr@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>