t23x: soc: safety: Add FSI multicore support

Enable FSI multi core support to communicate using CCPLEX fsicom demo
apps. It adds following to enable:
- add top2 hsp mailbox 5 and 4 for core 1 usage
- add FSI_CPU1 stream id for core 1 memory map in AST and SMMU
- new node per FSI core per SMMU instance

Bug 4243457

Change-Id: Id66c060d5daa1ca6458e3cbeee81dafc88904560
Signed-off-by: Dipen Patel <dipenp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2977860
(cherry picked from commit 4e450ca886 in
dev-main)
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2995454
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Dipen Patel
2023-11-14 20:56:16 +00:00
committed by mobile promotions
parent 7dfa45e768
commit 2d0af855ad
2 changed files with 81 additions and 36 deletions

View File

@@ -171,6 +171,12 @@
#define TEGRA234_SID_HOST1X_CTX6 0x3b
#define TEGRA234_SID_HOST1X_CTX7 0x3c
/*FSI Stream Id*/
#define TEGRA234_SID_NISO1_FSI_CPU0 TEGRA234_SID_FSI
#define TEGRA234_SID_NISO1_FSI_CPU1 0x4BU
#define TEGRA234_SID_NISO1_FSI_CPU2 0x4CU
#define TEGRA234_SID_NISO1_FSI_CPU3 0X4DU
/*
* memory client IDs
*/