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2d0af855ad
Enable FSI multi core support to communicate using CCPLEX fsicom demo
apps. It adds following to enable:
- add top2 hsp mailbox 5 and 4 for core 1 usage
- add FSI_CPU1 stream id for core 1 memory map in AST and SMMU
- new node per FSI core per SMMU instance
Bug 4243457
Change-Id: Id66c060d5daa1ca6458e3cbeee81dafc88904560
Signed-off-by: Dipen Patel <dipenp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2977860
(cherry picked from commit 4e450ca886 in
dev-main)
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2995454
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>