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dt-common: Append JETSON_COMPATIBLE for Jango SKU5

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Appended JETSON_COMPATIBLE with Jango SKU5 compatible to enable
the Jetson-IO support for the corresponding CVM based platforms

Bug 4028614

Change-Id: Ic48980d2403674efe81003aa45670e333f8c93b6
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/soc/tegra/+/2871166
(cherry picked from commit 6fd7ad0066d9a2ea30fe5a412419bd60304f96aa)
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/soc/tegra/+/2871658
Reviewed-by: Asha Talambedu <atalambedu@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: Gautham Srinivasan <gauthams@nvidia.com>
This commit is contained in:
Gautham Srinivasan
2023-03-14 16:38:24 -07:00
committed by Laxman Dewangan
parent ec4c352f3f
commit 320ef8b940
1 changed files with 2 additions and 2 deletions
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4
include/platforms/dt-bindings/tegra234-p3737-0000+p3701-0000.h
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -20,7 +20,7 @@
#include <dt-bindings/gpio/tegra234-gpio.h>
#define JETSON_COMPATIBLE "nvidia,p3737-0000+p3701-0000", "nvidia,p3737-0000+p3701-0004"
#define JETSON_COMPATIBLE "nvidia,p3737-0000+p3701-0000", "nvidia,p3737-0000+p3701-0004", "nvidia,p3737-0000+p3701-0005"
/* SoC function name for clock signal on 40-pin header pin 7 */
#define HDR40_CLK "extperiph4"