soc: Add HSP DT node

Add Tegra hsp DT node. The node content is copied from
platform specific DT to avoid duplication of same node
across platform.

Bug 4032485

Change-Id: I3bb60d9ffd6d06ff8340ea974c0681dcd714418b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/soc/t23x-generic-dts/+/2877145
Reviewed-by: svcacv <svcacv@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Laxman Dewangan
2023-03-26 18:22:59 +00:00
parent a68f5771b4
commit 3f41351c2c

View File

@@ -1184,6 +1184,18 @@
};
};
hsp_rce: tegra-hsp@b950000 {
compatible = "nvidia,tegra186-hsp";
reg = <0 0x0b950000 0 0x00090000>;
interrupts = <GIC_SPI TEGRA234_IRQ_RCE_HSP_SHARED_1 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI TEGRA234_IRQ_RCE_HSP_SHARED_2 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI TEGRA234_IRQ_RCE_HSP_SHARED_3 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI TEGRA234_IRQ_RCE_HSP_SHARED_4 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <2>;
interrupt-names = "shared1", "shared2", "shared3", "shared4";
status = "disabled";
};
tegra_mce@e100000 {
compatible = "nvidia,t23x-mce";
reg = <0x0 0x0E100000 0x0 0x00010000>, /* ARI BASE Core 0*/