mirror of
git://nv-tegra.nvidia.com/device/hardware/nvidia/t23x-public-dts.git
synced 2025-12-22 09:12:02 +03:00
tegra234: move opp from base overlay to tegra234 dts
OPP table in Upstream tegra234.dtsi is synched with latest
downstream table in below patch. In this change, moving
the table from base overlay to "nv-public/tegra234.dtsi" as
the tables are Upstreamed now.
https://lore.kernel.org/lkml/20230713133850.823-1-sumitg@nvidia.com/T/
Bug 4204733
Change-Id: I0969d0ac90b0c1c7c0a5c77eb532ffad646d3436
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2940613
(cherry picked from commit da6a15459c)
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2944872
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
This commit is contained in:
Sumit Gupta
committed by
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4568a0edb4
@@ -20,11 +20,6 @@
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#define TEGRA234_POWER_DOMAIN_DLAA 32U
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#define TEGRA234_POWER_DOMAIN_DLAB 33U
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/* ICC ID's for dummy MC clients used to represent CPU Clusters */
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#define TEGRA_ICC_MC_CPU_CLUSTER0 1003
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#define TEGRA_ICC_MC_CPU_CLUSTER1 1004
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#define TEGRA_ICC_MC_CPU_CLUSTER2 1005
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/ {
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overlay-name = "Add nvidia,t234 Overlay Support";
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compatible = "nvidia,tegra234";
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@@ -669,524 +664,50 @@
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cpu@0 {
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cpu-idle-states = <&C7>;
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operating-points-v2 = <&cl0_opp_tbl>;
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interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER0 &emc>;
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};
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cpu@100 {
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cpu-idle-states = <&C7>;
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operating-points-v2 = <&cl0_opp_tbl>;
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interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER0 &emc>;
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};
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cpu@200 {
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cpu-idle-states = <&C7>;
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operating-points-v2 = <&cl0_opp_tbl>;
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interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER0 &emc>;
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};
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cpu@300 {
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cpu-idle-states = <&C7>;
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operating-points-v2 = <&cl0_opp_tbl>;
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interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER0 &emc>;
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};
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cpu@10000 {
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cpu-idle-states = <&C7>;
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operating-points-v2 = <&cl1_opp_tbl>;
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interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER1 &emc>;
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};
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cpu@10100 {
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cpu-idle-states = <&C7>;
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operating-points-v2 = <&cl1_opp_tbl>;
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interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER1 &emc>;
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};
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cpu@10200 {
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cpu-idle-states = <&C7>;
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operating-points-v2 = <&cl1_opp_tbl>;
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interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER1 &emc>;
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};
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cpu@10300 {
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cpu-idle-states = <&C7>;
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operating-points-v2 = <&cl1_opp_tbl>;
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interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER1 &emc>;
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};
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cpu@20000 {
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cpu-idle-states = <&C7>;
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operating-points-v2 = <&cl2_opp_tbl>;
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interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER2 &emc>;
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};
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cpu@20100 {
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cpu-idle-states = <&C7>;
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operating-points-v2 = <&cl2_opp_tbl>;
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interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER2 &emc>;
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};
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cpu@20200 {
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cpu-idle-states = <&C7>;
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operating-points-v2 = <&cl2_opp_tbl>;
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interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER2 &emc>;
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};
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cpu@20300 {
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cpu-idle-states = <&C7>;
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operating-points-v2 = <&cl2_opp_tbl>;
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interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER2 &emc>;
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};
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};
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cl0_opp_tbl: opp-table-cluster0 {
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compatible = "operating-points-v2";
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opp-shared;
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cl0_ch1_opp1: opp-115200000 {
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opp-hz = /bits/ 64 <115200000>;
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opp-peak-kBps = <816000>;
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};
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cl0_ch1_opp2: opp-192000000 {
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opp-hz = /bits/ 64 <192000000>;
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opp-peak-kBps = <816000>;
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};
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cl0_ch1_opp3: opp-268800000 {
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opp-hz = /bits/ 64 <268800000>;
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opp-peak-kBps = <816000>;
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};
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cl0_ch1_opp4: opp-345600000 {
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opp-hz = /bits/ 64 <345600000>;
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opp-peak-kBps = <816000>;
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};
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cl0_ch1_opp5: opp-422400000 {
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opp-hz = /bits/ 64 <422400000>;
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opp-peak-kBps = <816000>;
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};
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cl0_ch1_opp6: opp-499200000 {
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opp-hz = /bits/ 64 <499200000>;
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opp-peak-kBps = <816000>;
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};
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cl0_ch1_opp7: opp-576000000 {
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opp-hz = /bits/ 64 <576000000>;
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opp-peak-kBps = <816000>;
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};
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cl0_ch1_opp8: opp-652800000 {
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opp-hz = /bits/ 64 <652800000>;
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opp-peak-kBps = <816000>;
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};
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cl0_ch1_opp9: opp-729600000 {
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opp-hz = /bits/ 64 <729600000>;
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opp-peak-kBps = <816000>;
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};
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cl0_ch1_opp10: opp-806400000 {
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opp-hz = /bits/ 64 <806400000>;
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opp-peak-kBps = <816000>;
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};
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cl0_ch1_opp11: opp-883200000 {
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opp-hz = /bits/ 64 <883200000>;
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opp-peak-kBps = <816000>;
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};
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cl0_ch1_opp12: opp-960000000 {
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opp-hz = /bits/ 64 <960000000>;
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opp-peak-kBps = <816000>;
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};
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cl0_ch1_opp13: opp-1036800000 {
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opp-hz = /bits/ 64 <1036800000>;
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opp-peak-kBps = <816000>;
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};
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cl0_ch1_opp14: opp-1113600000 {
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opp-hz = /bits/ 64 <1113600000>;
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opp-peak-kBps = <1632000>;
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};
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cl0_ch1_opp15: opp-1190400000 {
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opp-hz = /bits/ 64 <1190400000>;
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opp-peak-kBps = <1632000>;
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};
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cl0_ch1_opp16: opp-1267200000 {
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opp-hz = /bits/ 64 <1267200000>;
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opp-peak-kBps = <1632000>;
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};
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cl0_ch1_opp17: opp-1344000000 {
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opp-hz = /bits/ 64 <1344000000>;
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opp-peak-kBps = <1632000>;
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};
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cl0_ch1_opp18: opp-1420800000 {
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opp-hz = /bits/ 64 <1420800000>;
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opp-peak-kBps = <1632000>;
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};
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cl0_ch1_opp19: opp-1497600000 {
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opp-hz = /bits/ 64 <1497600000>;
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opp-peak-kBps = <3200000>;
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};
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cl0_ch1_opp20: opp-1574400000 {
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opp-hz = /bits/ 64 <1574400000>;
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opp-peak-kBps = <3200000>;
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};
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cl0_ch1_opp21: opp-1651200000 {
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opp-hz = /bits/ 64 <1651200000>;
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opp-peak-kBps = <3200000>;
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};
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cl0_ch1_opp22: opp-1728000000 {
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opp-hz = /bits/ 64 <1728000000>;
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opp-peak-kBps = <3200000>;
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};
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cl0_ch1_opp23: opp-1804800000 {
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opp-hz = /bits/ 64 <1804800000>;
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opp-peak-kBps = <3200000>;
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};
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cl0_ch1_opp24: opp-1881600000 {
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opp-hz = /bits/ 64 <1881600000>;
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opp-peak-kBps = <3200000>;
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};
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cl0_ch1_opp25: opp-1958400000 {
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opp-hz = /bits/ 64 <1958400000>;
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opp-peak-kBps = <3200000>;
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};
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cl0_ch1_opp26: opp-2035200000 {
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opp-hz = /bits/ 64 <2035200000>;
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opp-peak-kBps = <3200000>;
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};
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cl0_ch1_opp27: opp-2112000000 {
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opp-hz = /bits/ 64 <2112000000>;
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opp-peak-kBps = <6400000>;
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};
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cl0_ch1_opp28: opp-2188800000 {
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opp-hz = /bits/ 64 <2188800000>;
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opp-peak-kBps = <6400000>;
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};
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cl0_ch1_opp29: opp-2201600000 {
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opp-hz = /bits/ 64 <2201600000>;
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opp-peak-kBps = <6400000>;
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};
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};
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cl1_opp_tbl: opp-table-cluster1 {
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compatible = "operating-points-v2";
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opp-shared;
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cl1_ch1_opp1: opp-115200000 {
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opp-hz = /bits/ 64 <115200000>;
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opp-peak-kBps = <816000>;
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};
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cl1_ch1_opp2: opp-192000000 {
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opp-hz = /bits/ 64 <192000000>;
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opp-peak-kBps = <816000>;
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};
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cl1_ch1_opp3: opp-268800000 {
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opp-hz = /bits/ 64 <268800000>;
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opp-peak-kBps = <816000>;
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};
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cl1_ch1_opp4: opp-345600000 {
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opp-hz = /bits/ 64 <345600000>;
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opp-peak-kBps = <816000>;
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};
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cl1_ch1_opp5: opp-422400000 {
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opp-hz = /bits/ 64 <422400000>;
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opp-peak-kBps = <816000>;
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};
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cl1_ch1_opp6: opp-499200000 {
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opp-hz = /bits/ 64 <499200000>;
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opp-peak-kBps = <816000>;
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};
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cl1_ch1_opp7: opp-576000000 {
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opp-hz = /bits/ 64 <576000000>;
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opp-peak-kBps = <816000>;
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};
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cl1_ch1_opp8: opp-652800000 {
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opp-hz = /bits/ 64 <652800000>;
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opp-peak-kBps = <816000>;
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};
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cl1_ch1_opp9: opp-729600000 {
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opp-hz = /bits/ 64 <729600000>;
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opp-peak-kBps = <816000>;
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};
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cl1_ch1_opp10: opp-806400000 {
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opp-hz = /bits/ 64 <806400000>;
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opp-peak-kBps = <816000>;
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};
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cl1_ch1_opp11: opp-883200000 {
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opp-hz = /bits/ 64 <883200000>;
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opp-peak-kBps = <816000>;
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};
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cl1_ch1_opp12: opp-960000000 {
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opp-hz = /bits/ 64 <960000000>;
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opp-peak-kBps = <816000>;
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};
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cl1_ch1_opp13: opp-1036800000 {
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opp-hz = /bits/ 64 <1036800000>;
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opp-peak-kBps = <816000>;
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};
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cl1_ch1_opp14: opp-1113600000 {
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opp-hz = /bits/ 64 <1113600000>;
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opp-peak-kBps = <1632000>;
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};
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cl1_ch1_opp15: opp-1190400000 {
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opp-hz = /bits/ 64 <1190400000>;
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opp-peak-kBps = <1632000>;
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};
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cl1_ch1_opp16: opp-1267200000 {
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opp-hz = /bits/ 64 <1267200000>;
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opp-peak-kBps = <1632000>;
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};
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cl1_ch1_opp17: opp-1344000000 {
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opp-hz = /bits/ 64 <1344000000>;
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opp-peak-kBps = <1632000>;
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};
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cl1_ch1_opp18: opp-1420800000 {
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opp-hz = /bits/ 64 <1420800000>;
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opp-peak-kBps = <1632000>;
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};
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cl1_ch1_opp19: opp-1497600000 {
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opp-hz = /bits/ 64 <1497600000>;
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opp-peak-kBps = <3200000>;
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};
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cl1_ch1_opp20: opp-1574400000 {
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opp-hz = /bits/ 64 <1574400000>;
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opp-peak-kBps = <3200000>;
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};
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cl1_ch1_opp21: opp-1651200000 {
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opp-hz = /bits/ 64 <1651200000>;
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opp-peak-kBps = <3200000>;
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};
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cl1_ch1_opp22: opp-1728000000 {
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opp-hz = /bits/ 64 <1728000000>;
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opp-peak-kBps = <3200000>;
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};
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cl1_ch1_opp23: opp-1804800000 {
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opp-hz = /bits/ 64 <1804800000>;
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opp-peak-kBps = <3200000>;
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};
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cl1_ch1_opp24: opp-1881600000 {
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opp-hz = /bits/ 64 <1881600000>;
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opp-peak-kBps = <3200000>;
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};
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cl1_ch1_opp25: opp-1958400000 {
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opp-hz = /bits/ 64 <1958400000>;
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opp-peak-kBps = <3200000>;
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};
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cl1_ch1_opp26: opp-2035200000 {
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opp-hz = /bits/ 64 <2035200000>;
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opp-peak-kBps = <3200000>;
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};
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cl1_ch1_opp27: opp-2112000000 {
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opp-hz = /bits/ 64 <2112000000>;
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opp-peak-kBps = <6400000>;
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};
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cl1_ch1_opp28: opp-2188800000 {
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opp-hz = /bits/ 64 <2188800000>;
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opp-peak-kBps = <6400000>;
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};
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cl1_ch1_opp29: opp-2201600000 {
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opp-hz = /bits/ 64 <2201600000>;
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opp-peak-kBps = <6400000>;
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};
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};
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cl2_opp_tbl: opp-table-cluster2 {
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compatible = "operating-points-v2";
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opp-shared;
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cl2_ch1_opp1: opp-115200000 {
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opp-hz = /bits/ 64 <115200000>;
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opp-peak-kBps = <816000>;
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};
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cl2_ch1_opp2: opp-192000000 {
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opp-hz = /bits/ 64 <192000000>;
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opp-peak-kBps = <816000>;
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};
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cl2_ch1_opp3: opp-268800000 {
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opp-hz = /bits/ 64 <268800000>;
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opp-peak-kBps = <816000>;
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};
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cl2_ch1_opp4: opp-345600000 {
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opp-hz = /bits/ 64 <345600000>;
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opp-peak-kBps = <816000>;
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};
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cl2_ch1_opp5: opp-422400000 {
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opp-hz = /bits/ 64 <422400000>;
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opp-peak-kBps = <816000>;
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};
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cl2_ch1_opp6: opp-499200000 {
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opp-hz = /bits/ 64 <499200000>;
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opp-peak-kBps = <816000>;
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};
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cl2_ch1_opp7: opp-576000000 {
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opp-hz = /bits/ 64 <576000000>;
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opp-peak-kBps = <816000>;
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};
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cl2_ch1_opp8: opp-652800000 {
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opp-hz = /bits/ 64 <652800000>;
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opp-peak-kBps = <816000>;
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};
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cl2_ch1_opp9: opp-729600000 {
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opp-hz = /bits/ 64 <729600000>;
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opp-peak-kBps = <816000>;
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};
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cl2_ch1_opp10: opp-806400000 {
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opp-hz = /bits/ 64 <806400000>;
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opp-peak-kBps = <816000>;
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};
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cl2_ch1_opp11: opp-883200000 {
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opp-hz = /bits/ 64 <883200000>;
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opp-peak-kBps = <816000>;
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};
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cl2_ch1_opp12: opp-960000000 {
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opp-hz = /bits/ 64 <960000000>;
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opp-peak-kBps = <816000>;
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};
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cl2_ch1_opp13: opp-1036800000 {
|
||||
opp-hz = /bits/ 64 <1036800000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp14: opp-1113600000 {
|
||||
opp-hz = /bits/ 64 <1113600000>;
|
||||
opp-peak-kBps = <1632000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp15: opp-1190400000 {
|
||||
opp-hz = /bits/ 64 <1190400000>;
|
||||
opp-peak-kBps = <1632000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp16: opp-1267200000 {
|
||||
opp-hz = /bits/ 64 <1267200000>;
|
||||
opp-peak-kBps = <1632000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp17: opp-1344000000 {
|
||||
opp-hz = /bits/ 64 <1344000000>;
|
||||
opp-peak-kBps = <1632000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp18: opp-1420800000 {
|
||||
opp-hz = /bits/ 64 <1420800000>;
|
||||
opp-peak-kBps = <1632000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp19: opp-1497600000 {
|
||||
opp-hz = /bits/ 64 <1497600000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp20: opp-1574400000 {
|
||||
opp-hz = /bits/ 64 <1574400000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp21: opp-1651200000 {
|
||||
opp-hz = /bits/ 64 <1651200000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp22: opp-1728000000 {
|
||||
opp-hz = /bits/ 64 <1728000000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp23: opp-1804800000 {
|
||||
opp-hz = /bits/ 64 <1804800000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp24: opp-1881600000 {
|
||||
opp-hz = /bits/ 64 <1881600000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp25: opp-1958400000 {
|
||||
opp-hz = /bits/ 64 <1958400000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp26: opp-2035200000 {
|
||||
opp-hz = /bits/ 64 <2035200000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp27: opp-2112000000 {
|
||||
opp-hz = /bits/ 64 <2112000000>;
|
||||
opp-peak-kBps = <6400000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp28: opp-2188800000 {
|
||||
opp-hz = /bits/ 64 <2188800000>;
|
||||
opp-peak-kBps = <6400000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp29: opp-2201600000 {
|
||||
opp-hz = /bits/ 64 <2201600000>;
|
||||
opp-peak-kBps = <6400000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
486
tegra234.dtsi
486
tegra234.dtsi
@@ -3018,6 +3018,9 @@
|
||||
|
||||
enable-method = "psci";
|
||||
|
||||
operating-points-v2 = <&cl0_opp_tbl>;
|
||||
interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER0 &emc>;
|
||||
|
||||
i-cache-size = <65536>;
|
||||
i-cache-line-size = <64>;
|
||||
i-cache-sets = <256>;
|
||||
@@ -3034,6 +3037,9 @@
|
||||
|
||||
enable-method = "psci";
|
||||
|
||||
operating-points-v2 = <&cl0_opp_tbl>;
|
||||
interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER0 &emc>;
|
||||
|
||||
i-cache-size = <65536>;
|
||||
i-cache-line-size = <64>;
|
||||
i-cache-sets = <256>;
|
||||
@@ -3050,6 +3056,9 @@
|
||||
|
||||
enable-method = "psci";
|
||||
|
||||
operating-points-v2 = <&cl0_opp_tbl>;
|
||||
interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER0 &emc>;
|
||||
|
||||
i-cache-size = <65536>;
|
||||
i-cache-line-size = <64>;
|
||||
i-cache-sets = <256>;
|
||||
@@ -3066,6 +3075,9 @@
|
||||
|
||||
enable-method = "psci";
|
||||
|
||||
operating-points-v2 = <&cl0_opp_tbl>;
|
||||
interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER0 &emc>;
|
||||
|
||||
i-cache-size = <65536>;
|
||||
i-cache-line-size = <64>;
|
||||
i-cache-sets = <256>;
|
||||
@@ -3082,6 +3094,9 @@
|
||||
|
||||
enable-method = "psci";
|
||||
|
||||
operating-points-v2 = <&cl1_opp_tbl>;
|
||||
interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER1 &emc>;
|
||||
|
||||
i-cache-size = <65536>;
|
||||
i-cache-line-size = <64>;
|
||||
i-cache-sets = <256>;
|
||||
@@ -3098,6 +3113,9 @@
|
||||
|
||||
enable-method = "psci";
|
||||
|
||||
operating-points-v2 = <&cl1_opp_tbl>;
|
||||
interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER1 &emc>;
|
||||
|
||||
i-cache-size = <65536>;
|
||||
i-cache-line-size = <64>;
|
||||
i-cache-sets = <256>;
|
||||
@@ -3114,6 +3132,9 @@
|
||||
|
||||
enable-method = "psci";
|
||||
|
||||
operating-points-v2 = <&cl1_opp_tbl>;
|
||||
interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER1 &emc>;
|
||||
|
||||
i-cache-size = <65536>;
|
||||
i-cache-line-size = <64>;
|
||||
i-cache-sets = <256>;
|
||||
@@ -3130,6 +3151,9 @@
|
||||
|
||||
enable-method = "psci";
|
||||
|
||||
operating-points-v2 = <&cl1_opp_tbl>;
|
||||
interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER1 &emc>;
|
||||
|
||||
i-cache-size = <65536>;
|
||||
i-cache-line-size = <64>;
|
||||
i-cache-sets = <256>;
|
||||
@@ -3146,6 +3170,9 @@
|
||||
|
||||
enable-method = "psci";
|
||||
|
||||
operating-points-v2 = <&cl2_opp_tbl>;
|
||||
interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER2 &emc>;
|
||||
|
||||
i-cache-size = <65536>;
|
||||
i-cache-line-size = <64>;
|
||||
i-cache-sets = <256>;
|
||||
@@ -3162,6 +3189,9 @@
|
||||
|
||||
enable-method = "psci";
|
||||
|
||||
operating-points-v2 = <&cl2_opp_tbl>;
|
||||
interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER2 &emc>;
|
||||
|
||||
i-cache-size = <65536>;
|
||||
i-cache-line-size = <64>;
|
||||
i-cache-sets = <256>;
|
||||
@@ -3178,6 +3208,9 @@
|
||||
|
||||
enable-method = "psci";
|
||||
|
||||
operating-points-v2 = <&cl2_opp_tbl>;
|
||||
interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER2 &emc>;
|
||||
|
||||
i-cache-size = <65536>;
|
||||
i-cache-line-size = <64>;
|
||||
i-cache-sets = <256>;
|
||||
@@ -3194,6 +3227,9 @@
|
||||
|
||||
enable-method = "psci";
|
||||
|
||||
operating-points-v2 = <&cl2_opp_tbl>;
|
||||
interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER2 &emc>;
|
||||
|
||||
i-cache-size = <65536>;
|
||||
i-cache-line-size = <64>;
|
||||
i-cache-sets = <256>;
|
||||
@@ -3497,4 +3533,454 @@
|
||||
interrupt-parent = <&gic>;
|
||||
always-on;
|
||||
};
|
||||
|
||||
cl0_opp_tbl: opp-table-cluster0 {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
cl0_ch1_opp1: opp-115200000 {
|
||||
opp-hz = /bits/ 64 <115200000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl0_ch1_opp2: opp-192000000 {
|
||||
opp-hz = /bits/ 64 <192000000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl0_ch1_opp3: opp-268800000 {
|
||||
opp-hz = /bits/ 64 <268800000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl0_ch1_opp4: opp-345600000 {
|
||||
opp-hz = /bits/ 64 <345600000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl0_ch1_opp5: opp-422400000 {
|
||||
opp-hz = /bits/ 64 <422400000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl0_ch1_opp6: opp-499200000 {
|
||||
opp-hz = /bits/ 64 <499200000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl0_ch1_opp7: opp-576000000 {
|
||||
opp-hz = /bits/ 64 <576000000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl0_ch1_opp8: opp-652800000 {
|
||||
opp-hz = /bits/ 64 <652800000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl0_ch1_opp9: opp-729600000 {
|
||||
opp-hz = /bits/ 64 <729600000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl0_ch1_opp10: opp-806400000 {
|
||||
opp-hz = /bits/ 64 <806400000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl0_ch1_opp11: opp-883200000 {
|
||||
opp-hz = /bits/ 64 <883200000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl0_ch1_opp12: opp-960000000 {
|
||||
opp-hz = /bits/ 64 <960000000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl0_ch1_opp13: opp-1036800000 {
|
||||
opp-hz = /bits/ 64 <1036800000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl0_ch1_opp14: opp-1113600000 {
|
||||
opp-hz = /bits/ 64 <1113600000>;
|
||||
opp-peak-kBps = <1632000>;
|
||||
};
|
||||
|
||||
cl0_ch1_opp15: opp-1190400000 {
|
||||
opp-hz = /bits/ 64 <1190400000>;
|
||||
opp-peak-kBps = <1632000>;
|
||||
};
|
||||
|
||||
cl0_ch1_opp16: opp-1267200000 {
|
||||
opp-hz = /bits/ 64 <1267200000>;
|
||||
opp-peak-kBps = <1632000>;
|
||||
};
|
||||
|
||||
cl0_ch1_opp17: opp-1344000000 {
|
||||
opp-hz = /bits/ 64 <1344000000>;
|
||||
opp-peak-kBps = <1632000>;
|
||||
};
|
||||
|
||||
cl0_ch1_opp18: opp-1420800000 {
|
||||
opp-hz = /bits/ 64 <1420800000>;
|
||||
opp-peak-kBps = <1632000>;
|
||||
};
|
||||
|
||||
cl0_ch1_opp19: opp-1497600000 {
|
||||
opp-hz = /bits/ 64 <1497600000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl0_ch1_opp20: opp-1574400000 {
|
||||
opp-hz = /bits/ 64 <1574400000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl0_ch1_opp21: opp-1651200000 {
|
||||
opp-hz = /bits/ 64 <1651200000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl0_ch1_opp22: opp-1728000000 {
|
||||
opp-hz = /bits/ 64 <1728000000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl0_ch1_opp23: opp-1804800000 {
|
||||
opp-hz = /bits/ 64 <1804800000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl0_ch1_opp24: opp-1881600000 {
|
||||
opp-hz = /bits/ 64 <1881600000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl0_ch1_opp25: opp-1958400000 {
|
||||
opp-hz = /bits/ 64 <1958400000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl0_ch1_opp26: opp-2035200000 {
|
||||
opp-hz = /bits/ 64 <2035200000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl0_ch1_opp27: opp-2112000000 {
|
||||
opp-hz = /bits/ 64 <2112000000>;
|
||||
opp-peak-kBps = <6400000>;
|
||||
};
|
||||
|
||||
cl0_ch1_opp28: opp-2188800000 {
|
||||
opp-hz = /bits/ 64 <2188800000>;
|
||||
opp-peak-kBps = <6400000>;
|
||||
};
|
||||
|
||||
cl0_ch1_opp29: opp-2201600000 {
|
||||
opp-hz = /bits/ 64 <2201600000>;
|
||||
opp-peak-kBps = <6400000>;
|
||||
};
|
||||
};
|
||||
|
||||
cl1_opp_tbl: opp-table-cluster1 {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
cl1_ch1_opp1: opp-115200000 {
|
||||
opp-hz = /bits/ 64 <115200000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl1_ch1_opp2: opp-192000000 {
|
||||
opp-hz = /bits/ 64 <192000000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl1_ch1_opp3: opp-268800000 {
|
||||
opp-hz = /bits/ 64 <268800000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl1_ch1_opp4: opp-345600000 {
|
||||
opp-hz = /bits/ 64 <345600000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl1_ch1_opp5: opp-422400000 {
|
||||
opp-hz = /bits/ 64 <422400000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl1_ch1_opp6: opp-499200000 {
|
||||
opp-hz = /bits/ 64 <499200000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl1_ch1_opp7: opp-576000000 {
|
||||
opp-hz = /bits/ 64 <576000000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl1_ch1_opp8: opp-652800000 {
|
||||
opp-hz = /bits/ 64 <652800000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl1_ch1_opp9: opp-729600000 {
|
||||
opp-hz = /bits/ 64 <729600000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl1_ch1_opp10: opp-806400000 {
|
||||
opp-hz = /bits/ 64 <806400000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl1_ch1_opp11: opp-883200000 {
|
||||
opp-hz = /bits/ 64 <883200000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl1_ch1_opp12: opp-960000000 {
|
||||
opp-hz = /bits/ 64 <960000000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl1_ch1_opp13: opp-1036800000 {
|
||||
opp-hz = /bits/ 64 <1036800000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl1_ch1_opp14: opp-1113600000 {
|
||||
opp-hz = /bits/ 64 <1113600000>;
|
||||
opp-peak-kBps = <1632000>;
|
||||
};
|
||||
|
||||
cl1_ch1_opp15: opp-1190400000 {
|
||||
opp-hz = /bits/ 64 <1190400000>;
|
||||
opp-peak-kBps = <1632000>;
|
||||
};
|
||||
|
||||
cl1_ch1_opp16: opp-1267200000 {
|
||||
opp-hz = /bits/ 64 <1267200000>;
|
||||
opp-peak-kBps = <1632000>;
|
||||
};
|
||||
|
||||
cl1_ch1_opp17: opp-1344000000 {
|
||||
opp-hz = /bits/ 64 <1344000000>;
|
||||
opp-peak-kBps = <1632000>;
|
||||
};
|
||||
|
||||
cl1_ch1_opp18: opp-1420800000 {
|
||||
opp-hz = /bits/ 64 <1420800000>;
|
||||
opp-peak-kBps = <1632000>;
|
||||
};
|
||||
|
||||
cl1_ch1_opp19: opp-1497600000 {
|
||||
opp-hz = /bits/ 64 <1497600000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl1_ch1_opp20: opp-1574400000 {
|
||||
opp-hz = /bits/ 64 <1574400000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl1_ch1_opp21: opp-1651200000 {
|
||||
opp-hz = /bits/ 64 <1651200000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl1_ch1_opp22: opp-1728000000 {
|
||||
opp-hz = /bits/ 64 <1728000000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl1_ch1_opp23: opp-1804800000 {
|
||||
opp-hz = /bits/ 64 <1804800000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl1_ch1_opp24: opp-1881600000 {
|
||||
opp-hz = /bits/ 64 <1881600000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl1_ch1_opp25: opp-1958400000 {
|
||||
opp-hz = /bits/ 64 <1958400000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl1_ch1_opp26: opp-2035200000 {
|
||||
opp-hz = /bits/ 64 <2035200000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl1_ch1_opp27: opp-2112000000 {
|
||||
opp-hz = /bits/ 64 <2112000000>;
|
||||
opp-peak-kBps = <6400000>;
|
||||
};
|
||||
|
||||
cl1_ch1_opp28: opp-2188800000 {
|
||||
opp-hz = /bits/ 64 <2188800000>;
|
||||
opp-peak-kBps = <6400000>;
|
||||
};
|
||||
|
||||
cl1_ch1_opp29: opp-2201600000 {
|
||||
opp-hz = /bits/ 64 <2201600000>;
|
||||
opp-peak-kBps = <6400000>;
|
||||
};
|
||||
};
|
||||
|
||||
cl2_opp_tbl: opp-table-cluster2 {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
cl2_ch1_opp1: opp-115200000 {
|
||||
opp-hz = /bits/ 64 <115200000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp2: opp-192000000 {
|
||||
opp-hz = /bits/ 64 <192000000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp3: opp-268800000 {
|
||||
opp-hz = /bits/ 64 <268800000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp4: opp-345600000 {
|
||||
opp-hz = /bits/ 64 <345600000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp5: opp-422400000 {
|
||||
opp-hz = /bits/ 64 <422400000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp6: opp-499200000 {
|
||||
opp-hz = /bits/ 64 <499200000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp7: opp-576000000 {
|
||||
opp-hz = /bits/ 64 <576000000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp8: opp-652800000 {
|
||||
opp-hz = /bits/ 64 <652800000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp9: opp-729600000 {
|
||||
opp-hz = /bits/ 64 <729600000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp10: opp-806400000 {
|
||||
opp-hz = /bits/ 64 <806400000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp11: opp-883200000 {
|
||||
opp-hz = /bits/ 64 <883200000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp12: opp-960000000 {
|
||||
opp-hz = /bits/ 64 <960000000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp13: opp-1036800000 {
|
||||
opp-hz = /bits/ 64 <1036800000>;
|
||||
opp-peak-kBps = <816000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp14: opp-1113600000 {
|
||||
opp-hz = /bits/ 64 <1113600000>;
|
||||
opp-peak-kBps = <1632000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp15: opp-1190400000 {
|
||||
opp-hz = /bits/ 64 <1190400000>;
|
||||
opp-peak-kBps = <1632000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp16: opp-1267200000 {
|
||||
opp-hz = /bits/ 64 <1267200000>;
|
||||
opp-peak-kBps = <1632000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp17: opp-1344000000 {
|
||||
opp-hz = /bits/ 64 <1344000000>;
|
||||
opp-peak-kBps = <1632000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp18: opp-1420800000 {
|
||||
opp-hz = /bits/ 64 <1420800000>;
|
||||
opp-peak-kBps = <1632000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp19: opp-1497600000 {
|
||||
opp-hz = /bits/ 64 <1497600000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp20: opp-1574400000 {
|
||||
opp-hz = /bits/ 64 <1574400000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp21: opp-1651200000 {
|
||||
opp-hz = /bits/ 64 <1651200000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp22: opp-1728000000 {
|
||||
opp-hz = /bits/ 64 <1728000000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp23: opp-1804800000 {
|
||||
opp-hz = /bits/ 64 <1804800000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp24: opp-1881600000 {
|
||||
opp-hz = /bits/ 64 <1881600000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp25: opp-1958400000 {
|
||||
opp-hz = /bits/ 64 <1958400000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp26: opp-2035200000 {
|
||||
opp-hz = /bits/ 64 <2035200000>;
|
||||
opp-peak-kBps = <3200000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp27: opp-2112000000 {
|
||||
opp-hz = /bits/ 64 <2112000000>;
|
||||
opp-peak-kBps = <6400000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp28: opp-2188800000 {
|
||||
opp-hz = /bits/ 64 <2188800000>;
|
||||
opp-peak-kBps = <6400000>;
|
||||
};
|
||||
|
||||
cl2_ch1_opp29: opp-2201600000 {
|
||||
opp-hz = /bits/ 64 <2201600000>;
|
||||
opp-peak-kBps = <6400000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
Reference in New Issue
Block a user