arm64: tegra: Add DSU PMUs for Tegra234

Populate the DynamIQ Shared Unit (DSU) Performance Monitor Unit (PMU)
devices for Tegra234 which has one DSU PMU per CPU cluster.

Cherry picked from commit 8e0ae0fb4b91655bcdca2a4d7d16ebb81fc5d786

Change-Id: Ie4fe03fcb04d2ea7022d650e222d1c44f408e9e0
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2942606
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Jon Hunter
2023-03-06 15:01:57 +00:00
committed by mobile promotions
parent c76f3f744d
commit 5b1c490da5

View File

@@ -3450,6 +3450,24 @@
};
};
dsu-pmu0 {
compatible = "arm,dsu-pmu";
interrupts = <GIC_SPI 547 IRQ_TYPE_LEVEL_HIGH>;
cpus = <&cpu0_0>, <&cpu0_1>, <&cpu0_2>, <&cpu0_3>;
};
dsu-pmu1 {
compatible = "arm,dsu-pmu";
interrupts = <GIC_SPI 548 IRQ_TYPE_LEVEL_HIGH>;
cpus = <&cpu1_0>, <&cpu1_1>, <&cpu1_2>, <&cpu1_3>;
};
dsu-pmu2 {
compatible = "arm,dsu-pmu";
interrupts = <GIC_SPI 549 IRQ_TYPE_LEVEL_HIGH>;
cpus = <&cpu2_0>, <&cpu2_1>, <&cpu2_2>, <&cpu2_3>;
};
pmu {
compatible = "arm,cortex-a78-pmu";
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;