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nv-platform: p3701: separate cvm from nv-common

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Remove tegra234-p3701-0000.dtsi from
tegra234-p3737-0000+p3701-xxxx-nv-common.dtsi and have cvm-specific
file included in tegra234-p3737-0000+p3701-000*-nv.dts accordingly.

In addition, create tegra234-p3701-0005.dtsi which includes same
definitions as tegra234-p3701-0000.dtsi but with CMA size set to 512MB.
Hence,  no longer to handle the CMA size in the dynamic overlay.

Bug 4378720

Signed-off-by: Yi-Wei Wang <yiweiw@nvidia.com>
Change-Id: I4230f7d7a0a3cc5e189ee5a121981123bbb889c5
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3016296
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Yi-Wei Wang
2023-11-15 14:39:35 +08:00
committed by mobile promotions
parent b3d85c9765
commit 62c5d9f2f6
7 changed files with 26 additions and 16 deletions
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21
nv-platform/tegra234-p3701-0005.dtsi Normal file
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@@ -0,0 +1,21 @@
// SPDX-License-Identifier: GPL-2.0-only
// SPDX-FileCopyrightText: Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
#include "tegra234-p3701-0000.dtsi"
/ {
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
linux,cma { /* Needed for nvgpu comptags */
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x20000000>; /* 512MB */
alignment = <0x0 0x10000>;
linux,cma-default;
status = "okay";
};
};
};

1
nv-platform/tegra234-p3737-0000+p3701-0000-nv.dts
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@@ -5,3 +5,4 @@
#include "tegra234-p3737-0000+p3701-0000.dts"
#include "tegra234-p3737-0000+p3701-xxxx-nv-common.dtsi"
#include "tegra234-p3701-0000.dtsi"

1
nv-platform/tegra234-p3737-0000+p3701-0004-nv.dts
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@@ -5,3 +5,4 @@
#include "staging/tegra234-p3737-0000+p3701-0004.dts"
#include "tegra234-p3737-0000+p3701-xxxx-nv-common.dtsi"
#include "tegra234-p3701-0000.dtsi"

1
nv-platform/tegra234-p3737-0000+p3701-0005-nv.dts
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@@ -5,3 +5,4 @@
#include "staging/tegra234-p3737-0000+p3701-0005.dts"
#include "tegra234-p3737-0000+p3701-xxxx-nv-common.dtsi"
#include "tegra234-p3701-0005.dtsi"

1
nv-platform/tegra234-p3737-0000+p3701-0008-nv.dts
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@@ -5,3 +5,4 @@
#include "staging/tegra234-p3737-0000+p3701-0008.dts"
#include "tegra234-p3737-0000+p3701-xxxx-nv-common.dtsi"
#include "tegra234-p3701-0008.dtsi"

1
nv-platform/tegra234-p3737-0000+p3701-xxxx-nv-common.dtsi
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@@ -8,7 +8,6 @@
#include "nv-soc/tegra234-soc-audio-dai-links.dtsi"
#include "nv-soc/tegra234-soc-camera.dtsi"
#include "tegra234-p3737-0000.dtsi"
#include "tegra234-p3701-0000.dtsi"
#include "tegra234-dcb-p3737-0000-p3701-0000.dtsi"
/ {

16
overlay/tegra234-p3737-0000+p3701-0000-dynamic.dts
View File

@@ -13,20 +13,6 @@
overlay-name = "Tegra234 p3737-0000+p3701-xxxx Dynamic Overlay";
fragment-t234-p3737-0000-p3701-0000@0 {
target-path = "/";
board_config {
ids = "3701-0005-*","3701-0008-*";
};
__overlay__ {
reserved-memory {
linux,cma { /* Needed for nvgpu comptags */
size = <0x0 0x20000000>; /* 512MB */
};
};
};
};
fragment-t234-p3737-0000-p3701-0000@1 {
target-path = "/";
board_config {
ids = ">=3737-0000-TS4", ">=3737-0000-RC1", ">=3737-0000-300";
@@ -69,7 +55,7 @@
};
};
fragment-t234-p3737-0000-p3701-0000@2 {
fragment-t234-p3737-0000-p3701-0000@1 {
target-path = "/";
board_config {
ids = "3737-0000-TS1","3737-0000-TS2","3737-0000-TS3","3737-0000-EB1","3737-0000-EB2","3737-0000-EB3","3737-0000-000","3737-0000-100","3737-0000-200";