mirror of
git://nv-tegra.nvidia.com/device/hardware/nvidia/t23x-public-dts.git
synced 2025-12-22 09:12:02 +03:00
t23x: Add Hawk & Owl overlays for P3762
Add following overlays for Hawk+Owl
1xHAWK: tegra234-p3737-camera-p3762-a00-1Hawk-overlay.dtbo
2xHAWK: tegra234-p3737-camera-p3762-a00-2Hawk-overlay.dtbo
3xHAWK+3xOWL: tegra234-p3737-camera-p3762-a00-3Hawk-3Owl-overlay.dtbo
4xHAWK: tegra234-p3737-camera-p3762-a00-4Hawk-overlay.dtbo
4xOWL: tegra234-p3737-camera-p3762-a00-4Owl-overlay.dtbo
Bug 4583168
Change-Id: I7d03978628ead5b761668b58e05d6c35553ac52f
Signed-off-by: Ankur Pawar<ankurp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3109502
(cherry picked from commit e979b90a55)
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3203952
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Ankur Pawar
committed by
mobile promotions
mobile promotions
parent
a80675405f
commit
63f16420ec
@@ -4,7 +4,7 @@
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/dts-v1/;
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/plugin/;
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#include "tegra234-camera-p3762-a00.dtsi"
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#include "tegra234-p3737-camera-p3762-a00.dtsi"
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#include "dt-bindings/gpio/tegra234-gpio.h"
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#include "dt-bindings/clock/tegra234-clock.h"
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#include <dt-bindings/tegra234-p3737-0000+p3701-0000.h>
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@@ -27,112 +27,30 @@
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target-path = "/";
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__overlay__ {
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bus@0 {
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/* set camera gpio direction to output */
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gpio@2200000 {
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camera-control-output-low {
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gpio-hog;
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output-low;
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gpios = <CAM0_RST_L 0 CAM0_PWDN 0
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CAM1_RST_L 0 CAM1_PWDN 0>;
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label = "cam0-rst", "cam0-pwdn",
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"cam1-rst", "cam1-pwdn";
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};
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};
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i2c@3180000 {
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max96712_b@62 {
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compatible = "nvidia,max96712";
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reg = <0x62>;
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channel = "b";
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pwdn-gpios = <&gpio CAM1_PWDN GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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ar0234_i@30 {
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status = "okay";
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def-addr = <0x18>;
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/* Define any required hw resources needed by driver */
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/* ie. clocks, io pins, power sources */
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clocks = <&bpmp TEGRA234_CLK_EXTPERIPH1>,
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<&bpmp TEGRA234_CLK_EXTPERIPH1>;
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clock-names = "extperiph1", "pllp_grtba";
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mclk = "extperiph1";
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channel = "b";
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has-eeprom;
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eeprom-addr = <0x38>;
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reset-gpios = <&gpio CAM1_RST_L GPIO_ACTIVE_HIGH>;
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pwdn-gpios = <&gpio CAM1_PWDN GPIO_ACTIVE_HIGH>;
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pwr-gpios = <&gpio PWR_EN GPIO_ACTIVE_HIGH>;
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};
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ar0234_j@32 {
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status = "okay";
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def-addr = <0x18>;
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/* Define any required hw resources needed by driver */
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/* ie. clocks, io pins, power sources */
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clocks = <&bpmp TEGRA234_CLK_EXTPERIPH1>,
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<&bpmp TEGRA234_CLK_EXTPERIPH1>;
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clock-names = "extperiph1", "pllp_grtba";
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mclk = "extperiph1";
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channel = "b";
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has-eeprom;
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eeprom-addr = <0x3a>;
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reset-gpios = <&gpio CAM1_RST_L GPIO_ACTIVE_HIGH>;
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pwdn-gpios = <&gpio CAM1_PWDN GPIO_ACTIVE_HIGH>;
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pwr-gpios = <&gpio PWR_EN GPIO_ACTIVE_HIGH>;
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};
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ar0234_k@34 {
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status = "okay";
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def-addr = <0x18>;
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/* Define any required hw resources needed by driver */
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/* ie. clocks, io pins, power sources */
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clocks = <&bpmp TEGRA234_CLK_EXTPERIPH1>,
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<&bpmp TEGRA234_CLK_EXTPERIPH1>;
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clock-names = "extperiph1", "pllp_grtba";
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mclk = "extperiph1";
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channel = "b";
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has-eeprom;
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eeprom-addr = <0x3c>;
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reset-gpios = <&gpio CAM1_RST_L GPIO_ACTIVE_HIGH>;
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pwdn-gpios = <&gpio CAM1_PWDN GPIO_ACTIVE_HIGH>;
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pwr-gpios = <&gpio PWR_EN GPIO_ACTIVE_HIGH>;
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};
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ar0234_l@36 {
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status = "okay";
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def-addr = <0x18>;
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/* Define any required hw resources needed by driver */
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/* ie. clocks, io pins, power sources */
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clocks = <&bpmp TEGRA234_CLK_EXTPERIPH1>,
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<&bpmp TEGRA234_CLK_EXTPERIPH1>;
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clock-names = "extperiph1", "pllp_grtba";
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mclk = "extperiph1";
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channel = "b";
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has-eeprom;
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eeprom-addr = <0x3e>;
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reset-gpios = <&gpio CAM1_RST_L GPIO_ACTIVE_HIGH>;
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pwdn-gpios = <&gpio CAM1_PWDN GPIO_ACTIVE_HIGH>;
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pwr-gpios = <&gpio PWR_EN GPIO_ACTIVE_HIGH>;
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};
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};
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i2c@31e0000 {
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max96712_a@62 {
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compatible = "nvidia,max96712";
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reg = <0x62>;
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channel = "a";
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pwdn-gpios = <&gpio CAM0_PWDN GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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virtual_i2c_mux@50 {
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reg = <0x50>;
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compatible = "nvidia,virtual-i2c-mux";
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#address-cells = <1>;
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#size-cells = <0>;
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i2c-parent = <&dp_aux_ch3_i2c>;
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status = "okay";
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i2c@0 {
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reg = <0>;
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i2c-mux,deselect-on-exit;
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#address-cells = <1>;
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#size-cells = <0>;
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bmi088_a@69 {
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compatible = "bmi,bmi088";
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reg = <0x69>;
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@@ -148,137 +66,29 @@
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};
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ar0234_a@30 {
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status = "okay";
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def-addr = <0x10>;
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/* Define any required hw resources needed by driver */
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/* ie. clocks, io pins, power sources */
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clocks = <&bpmp TEGRA234_CLK_EXTPERIPH1>,
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<&bpmp TEGRA234_CLK_EXTPERIPH1>;
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clock-names = "extperiph1", "pllp_grtba";
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mclk = "extperiph1";
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channel = "a";
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has-eeprom;
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eeprom-addr = <0x40>;
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reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
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pwdn-gpios = <&gpio CAM0_PWDN GPIO_ACTIVE_HIGH>;
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pwr-gpios = <&gpio PWR_EN GPIO_ACTIVE_HIGH>;
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};
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ar0234_b@31 {
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status = "okay";
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def-addr = <0x18>;
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/* Define any required hw resources needed by driver */
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/* ie. clocks, io pins, power sources */
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clocks = <&bpmp TEGRA234_CLK_EXTPERIPH1>,
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<&bpmp TEGRA234_CLK_EXTPERIPH1>;
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clock-names = "extperiph1", "pllp_grtba";
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mclk = "extperiph1";
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channel = "a";
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has-eeprom;
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eeprom-addr = <0x40>;
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reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
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pwdn-gpios = <&gpio CAM0_PWDN GPIO_ACTIVE_HIGH>;
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pwr-gpios = <&gpio PWR_EN GPIO_ACTIVE_HIGH>;
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};
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};
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i2c@1 {
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reg = <1>;
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i2c-mux,deselect-on-exit;
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#address-cells = <1>;
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#size-cells = <0>;
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ar0234_c@32 {
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status = "okay";
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def-addr = <0x10>;
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/* Define any required hw resources needed by driver */
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/* ie. clocks, io pins, power sources */
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clocks = <&bpmp TEGRA234_CLK_EXTPERIPH1>,
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<&bpmp TEGRA234_CLK_EXTPERIPH1>;
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clock-names = "extperiph1", "pllp_grtba";
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mclk = "extperiph1";
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channel = "a";
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has-eeprom;
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eeprom-addr = <0x15>;
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reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
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pwdn-gpios = <&gpio CAM0_PWDN GPIO_ACTIVE_HIGH>;
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pwr-gpios = <&gpio PWR_EN GPIO_ACTIVE_HIGH>;
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};
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ar0234_d@33 {
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status = "okay";
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def-addr = <0x18>;
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/* Define any required hw resources needed by driver */
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/* ie. clocks, io pins, power sources */
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clocks = <&bpmp TEGRA234_CLK_EXTPERIPH1>,
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<&bpmp TEGRA234_CLK_EXTPERIPH1>;
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clock-names = "extperiph1", "pllp_grtba";
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mclk = "extperiph1";
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channel = "a";
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has-eeprom;
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eeprom-addr = <0x15>;
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reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
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pwdn-gpios = <&gpio CAM0_PWDN GPIO_ACTIVE_HIGH>;
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pwr-gpios = <&gpio PWR_EN GPIO_ACTIVE_HIGH>;
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};
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ar0234_e@34 {
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status = "okay";
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def-addr = <0x10>;
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/* Define any required hw resources needed by driver */
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/* ie. clocks, io pins, power sources */
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clocks = <&bpmp TEGRA234_CLK_EXTPERIPH1>,
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<&bpmp TEGRA234_CLK_EXTPERIPH1>;
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clock-names = "extperiph1", "pllp_grtba";
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mclk = "extperiph1";
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channel = "a";
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has-eeprom;
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eeprom-addr = <0x44>;
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reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
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pwdn-gpios = <&gpio CAM0_PWDN GPIO_ACTIVE_HIGH>;
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pwr-gpios = <&gpio PWR_EN GPIO_ACTIVE_HIGH>;
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};
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ar0234_f@35 {
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status = "okay";
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def-addr = <0x18>;
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/* Define any required hw resources needed by driver */
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/* ie. clocks, io pins, power sources */
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clocks = <&bpmp TEGRA234_CLK_EXTPERIPH1>,
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<&bpmp TEGRA234_CLK_EXTPERIPH1>;
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clock-names = "extperiph1", "pllp_grtba";
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mclk = "extperiph1";
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channel = "a";
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has-eeprom;
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eeprom-addr = <0x44>;
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reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
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pwdn-gpios = <&gpio CAM0_PWDN GPIO_ACTIVE_HIGH>;
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pwr-gpios = <&gpio PWR_EN GPIO_ACTIVE_HIGH>;
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};
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ar0234_g@36 {
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status = "okay";
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def-addr = <0x10>;
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/* Define any required hw resources needed by driver */
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/* ie. clocks, io pins, power sources */
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clocks = <&bpmp TEGRA234_CLK_EXTPERIPH1>,
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<&bpmp TEGRA234_CLK_EXTPERIPH1>;
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clock-names = "extperiph1", "pllp_grtba";
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mclk = "extperiph1";
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channel = "a";
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has-eeprom;
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eeprom-addr = <0x46>;
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reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
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pwdn-gpios = <&gpio CAM0_PWDN GPIO_ACTIVE_HIGH>;
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pwr-gpios = <&gpio PWR_EN GPIO_ACTIVE_HIGH>;
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};
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ar0234_h@37 {
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status = "okay";
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def-addr = <0x18>;
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/* Define any required hw resources needed by driver */
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/* ie. clocks, io pins, power sources */
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clocks = <&bpmp TEGRA234_CLK_EXTPERIPH1>,
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<&bpmp TEGRA234_CLK_EXTPERIPH1>;
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clock-names = "extperiph1", "pllp_grtba";
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mclk = "extperiph1";
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channel = "a";
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has-eeprom;
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eeprom-addr = <0x46>;
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reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
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pwdn-gpios = <&gpio CAM0_PWDN GPIO_ACTIVE_HIGH>;
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pwr-gpios = <&gpio PWR_EN GPIO_ACTIVE_HIGH>;
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};
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};
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};
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@@ -286,15 +96,4 @@
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};
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};
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};
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fragment-cam-cdi-tsc@0 {
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target-path = "/";
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__overlay__ {
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tsc_sig_gen@c6a0000 {
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status = "okay";
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generator@380 {
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status = "okay";
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};
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};
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};
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};
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};
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