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soc: t23x-generic-dts: add aon and top1 hsp nodes

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- Add AON and TOP1 HSP nodes to the base dts file to enable
  the AON kernel mode driver.

Bug 3962483

Signed-off-by: Akhilesh Reddy Khumbum <akhumbum@nvidia.com>
Change-Id: If21606dbed6472f3f808e1bd20e3391685c2c0b4
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/soc/t23x-generic-dts/+/2873057
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Robert Collins <rcollins@nvidia.com>
This commit is contained in:
Akhilesh Reddy Khumbum
2023-03-17 12:22:21 -07:00
committed by Laxman Dewangan
parent 6e11d91e2d
commit 8da2465d86
1 changed files with 55 additions and 0 deletions
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55
tegra234.dtsi
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@@ -981,6 +981,17 @@
#mbox-cells = <2>;
};
hsp_top1: tegra-hsp@3d00000 {
compatible = "nvidia,tegra234-hsp", "nvidia,tegra194-hsp";
reg = <0x03d00000 0x000a0000>;
interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "shared0", "shared1", "shared2", "shared3";
#mbox-cells = <2>;
};
ethernet@6800000 {
compatible = "nvidia,tegra234-mgbe";
reg = <0x06800000 0x10000>,
@@ -2669,6 +2680,50 @@
};
};
aon: aon@c000000 {
compatible = "nvidia,tegra234-aon";
iommus = <&smmu_niso0 TEGRA234_SID_AON>;
dma-coherent;
/* common mailbox binding property, should be 1. */
#mbox-cells = <1>;
reg = <0 0xc000000 0 0x800000>;
nvidia,ivc-carveout-base-ss = <0>;
nvidia,ivc-carveout-size-ss = <1>;
nvidia,ivc-rx-ss = <2>;
nvidia,ivc-tx-ss = <3>;
/* mailbox for debugging */
mboxes = <&aon 0>;
hsp {
compatible = "nvidia,tegra-aon-hsp";
mboxes =
<&hsp_top1 TEGRA_HSP_MBOX_TYPE_SM TEGRA_HSP_SM_TX(5)>,
<&hsp_top1 TEGRA_HSP_MBOX_TYPE_SM TEGRA_HSP_SM_RX(4)>;
mbox-names = "ivc-tx", "ivc-rx";
};
ivc-channels@80000000 {
#address-cells = <1>;
#size-cells = <0>;
ivc_aon_aondbg@0 {
reg = <0x0000>, <0x10000>;
reg-names = "rx", "tx";
nvidia,frame-count = <2>;
nvidia,frame-size = <64>;
};
ivc_aon_echo@100 {
reg = <0x0100>, <0x10100>;
reg-names = "rx", "tx";
nvidia,frame-count = <16>;
nvidia,frame-size = <64>;
};
};
};
cpus {
#address-cells = <1>;
#size-cells = <0>;