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git://nv-tegra.nvidia.com/device/hardware/nvidia/t23x-public-dts.git
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t234:[P3762/P3783]: Fix probe fail of Hawks during boot.
1. Made all sensors of Hawks as master sensors so any sensor is capable to program SERIALIZERS i2c address translation during probe time i.e first come first basis.So, We wont miss or skip SERIALIZERS i2c trans. 2. Changed i2c bus 8 freq to 400khz Bug 4510846 Change-Id: I4f62d1d5a7f75f507273c06b5118814e4867f8a9 Signed-off-by: Praveen AC <pac@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3133426 Tested-by: Shubham Chandra <shubhamc@nvidia.com> Reviewed-by: Shubham Chandra <shubhamc@nvidia.com> GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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@@ -1,5 +1,5 @@
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// SPDX-License-Identifier: GPL-2.0-only
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// SPDX-License-Identifier: GPL-2.0-only
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// SPDX-FileCopyrightText: Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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// SPDX-FileCopyrightText: Copyright (c) 2023-2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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/* 12 camera module with 4 hawks and 4 Owls
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/* 12 camera module with 4 hawks and 4 Owls
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* HAWK1 - 2 ar0234 cameras - max96712 Aggregator 1 - GMSL0
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* HAWK1 - 2 ar0234 cameras - max96712 Aggregator 1 - GMSL0
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@@ -750,6 +750,8 @@
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};
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};
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/*i2c8*/
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/*i2c8*/
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i2c@31e0000 {
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i2c@31e0000 {
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/* Set i2c freq to 400khz */
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clock-frequency = <400000>;
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virtual_i2c_mux@50 {
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virtual_i2c_mux@50 {
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i2c@0 {
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i2c@0 {
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ar0234_a@30 {
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ar0234_a@30 {
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@@ -1,5 +1,5 @@
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// SPDX-License-Identifier: GPL-2.0-only
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// SPDX-License-Identifier: GPL-2.0-only
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// SPDX-FileCopyrightText: Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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// SPDX-FileCopyrightText: Copyright (c) 2023-2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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/* 12 camera module with 4 hawks and 4 Owls
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/* 12 camera module with 4 hawks and 4 Owls
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* HAWK1 - 2 ar0234 cameras - max96712 Aggregator 1 - GMSL0
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* HAWK1 - 2 ar0234 cameras - max96712 Aggregator 1 - GMSL0
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@@ -750,6 +750,8 @@
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};
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};
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/*i2c8*/
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/*i2c8*/
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i2c@31e0000 {
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i2c@31e0000 {
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/* Set i2c freq to 400khz */
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clock-frequency = <400000>;
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virtual_i2c_mux@50 {
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virtual_i2c_mux@50 {
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i2c@0 {
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i2c@0 {
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ar0234_a@30 {
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ar0234_a@30 {
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@@ -171,7 +171,7 @@
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<&bpmp TEGRA234_CLK_EXTPERIPH1>;
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<&bpmp TEGRA234_CLK_EXTPERIPH1>;
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clock-names = "extperiph1", "pllp_grtba";
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clock-names = "extperiph1", "pllp_grtba";
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mclk = "extperiph1";
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mclk = "extperiph1";
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channel = "c";
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channel = "a";
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has-eeprom;
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has-eeprom;
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eeprom-addr = <0x40>;
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eeprom-addr = <0x40>;
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reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
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reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
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@@ -209,7 +209,7 @@
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<&bpmp TEGRA234_CLK_EXTPERIPH1>;
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<&bpmp TEGRA234_CLK_EXTPERIPH1>;
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clock-names = "extperiph1", "pllp_grtba";
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clock-names = "extperiph1", "pllp_grtba";
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mclk = "extperiph1";
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mclk = "extperiph1";
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channel = "c";
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channel = "a";
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has-eeprom;
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has-eeprom;
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eeprom-addr = <0x42>;
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eeprom-addr = <0x42>;
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reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
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reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
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@@ -241,7 +241,7 @@
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<&bpmp TEGRA234_CLK_EXTPERIPH1>;
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<&bpmp TEGRA234_CLK_EXTPERIPH1>;
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clock-names = "extperiph1", "pllp_grtba";
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clock-names = "extperiph1", "pllp_grtba";
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mclk = "extperiph1";
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mclk = "extperiph1";
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channel = "c";
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channel = "a";
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has-eeprom;
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has-eeprom;
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eeprom-addr = <0x44>;
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eeprom-addr = <0x44>;
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reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
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reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
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@@ -273,7 +273,7 @@
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<&bpmp TEGRA234_CLK_EXTPERIPH1>;
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<&bpmp TEGRA234_CLK_EXTPERIPH1>;
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clock-names = "extperiph1", "pllp_grtba";
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clock-names = "extperiph1", "pllp_grtba";
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mclk = "extperiph1";
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mclk = "extperiph1";
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channel = "c";
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channel = "a";
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has-eeprom;
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has-eeprom;
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eeprom-addr = <0x46>;
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eeprom-addr = <0x46>;
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reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
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reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
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