t23x: overlay: add jetson-io support for ONX super

Add compatible strings to support Orin NX/Nano super
configuration in jetson-io tool.

Bug 4131473

Change-Id: Ia49e1cd5195203bd456dd3b21dd2173f1d44a6bf
Signed-off-by: Gautham Srinivasan <gauthams@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3273805
Reviewed-by: Sheetal . <sheetal@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Johnny Liu <johnliu@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: Johnny Liu <johnliu@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>

include/platforms/dt-bindings/tegra234-p3767-0000-common.h

@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES.  All rights reserved.
+/* SPDX-FileCopyrightText: Copyright (c) 2023-2024, NVIDIA CORPORATION & AFFILIATES.  All rights reserved.
  *
  * Definitions for Jetson tegra234-p3767-0000 board.
  */
@@ -11,7 +10,12 @@
                                         "nvidia,p3768-0000+p3767-0001", \
                                         "nvidia,p3768-0000+p3767-0003", \
                                         "nvidia,p3768-0000+p3767-0004", \
-                                        "nvidia,p3768-0000+p3767-0005"
+                                        "nvidia,p3768-0000+p3767-0005", \
+                                        "nvidia,p3768-0000+p3767-0000-super", \
+                                        "nvidia,p3768-0000+p3767-0001-super", \
+                                        "nvidia,p3768-0000+p3767-0003-super", \
+                                        "nvidia,p3768-0000+p3767-0004-super", \
+                                        "nvidia,p3768-0000+p3767-0005-super"
 
 #define JETSON_COMPATIBLE_P3509		"nvidia,p3509-0000+p3767-0000", \
                                         "nvidia,p3509-0000+p3767-0001", \

nv-platform/Makefile

@@ -17,12 +17,17 @@ dtb-y += tegra234-p3740-0002+p3701-0008-nv.dtb
 dtb-y += tegra234-p3740-0002+p3701-0008-nv-safety.dtb
 dtb-y += tegra234-p3768-0000+p3767-0000-nv.dtb
 dtb-y += tegra234-p3768-0000+p3767-0000-nv-px1.dtb
+dtb-y += tegra234-p3768-0000+p3767-0000-nv-super.dtb
 dtb-y += tegra234-p3768-0000+p3767-0000-nv-taylor-high.dtb
 dtb-y += tegra234-p3768-0000+p3767-0000-nv-taylor-low.dtb
 dtb-y += tegra234-p3768-0000+p3767-0001-nv.dtb
+dtb-y += tegra234-p3768-0000+p3767-0001-nv-super.dtb
 dtb-y += tegra234-p3768-0000+p3767-0003-nv.dtb
+dtb-y += tegra234-p3768-0000+p3767-0003-nv-super.dtb
 dtb-y += tegra234-p3768-0000+p3767-0004-nv.dtb
+dtb-y += tegra234-p3768-0000+p3767-0004-nv-super.dtb
 dtb-y += tegra234-p3768-0000+p3767-0005-nv.dtb
+dtb-y += tegra234-p3768-0000+p3767-0005-nv-super.dtb
 
 ifneq ($(dtb-y),)
 dtb-y := $(addprefix $(makefile-path)/,$(dtb-y))

nv-platform/tegra234-p3768-0000+p3767-0000-nv-super.dts

@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0
+// SPDX-FileCopyrightText: Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES.  All rights reserved.
+
+/dts-v1/;
+
+#include "tegra234-p3768-0000+p3767-0000-nv.dts"
+
+/ {
+	compatible = "nvidia,p3768-0000+p3767-0000-super", "nvidia,p3767-0000", "nvidia,tegra234";
+	model = "NVIDIA Jetson Orin NX Engineering Reference Developer Kit Super";
+};

nv-platform/tegra234-p3768-0000+p3767-0001-nv-super.dts

@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0
+// SPDX-FileCopyrightText: Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES.  All rights reserved.
+
+/dts-v1/;
+
+#include "tegra234-p3768-0000+p3767-0001-nv.dts"
+
+/ {
+	compatible = "nvidia,p3768-0000+p3767-0001-super", "nvidia,p3767-0001", "nvidia,tegra234";
+	model = "NVIDIA Jetson Orin NX Engineering Reference Developer Kit Super";
+};

nv-platform/tegra234-p3768-0000+p3767-0003-nv-super.dts

@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0
+// SPDX-FileCopyrightText: Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES.  All rights reserved.
+
+/dts-v1/;
+
+#include "tegra234-p3768-0000+p3767-0003-nv.dts"
+
+/ {
+	compatible = "nvidia,p3768-0000+p3767-0003-super", "nvidia,p3767-0003", "nvidia,tegra234";
+	model = "NVIDIA Jetson Orin Nano Engineering Reference Developer Kit Super";
+};
+
+/delete-node/ &{/opp-table-cluster0/opp-1510400000};
+/delete-node/ &{/opp-table-cluster1/opp-1510400000};
+/delete-node/ &{/opp-table-cluster2/opp-1510400000};

nv-platform/tegra234-p3768-0000+p3767-0004-nv-super.dts

@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0
+// SPDX-FileCopyrightText: Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES.  All rights reserved.
+
+/dts-v1/;
+
+#include "tegra234-p3768-0000+p3767-0004-nv.dts"
+
+/ {
+	compatible = "nvidia,p3768-0000+p3767-0004-super", "nvidia,p3767-0004", "nvidia,tegra234";
+	model = "NVIDIA Jetson Orin Nano Engineering Reference Developer Kit Super";
+};
+
+/delete-node/ &{/opp-table-cluster0/opp-1510400000};
+/delete-node/ &{/opp-table-cluster1/opp-1510400000};
+/delete-node/ &{/opp-table-cluster2/opp-1510400000};

nv-platform/tegra234-p3768-0000+p3767-0005-nv-super.dts

@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0
+// SPDX-FileCopyrightText: Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES.  All rights reserved.
+
+/dts-v1/;
+
+#include "tegra234-p3768-0000+p3767-0005-nv.dts"
+
+/ {
+	compatible = "nvidia,p3768-0000+p3767-0005-super", "nvidia,p3767-0005", "nvidia,tegra234";
+	model = "NVIDIA Jetson Orin Nano Engineering Reference Developer Kit Super";
+};
+
+/delete-node/ &{/opp-table-cluster0/opp-1510400000};
+/delete-node/ &{/opp-table-cluster1/opp-1510400000};
+/delete-node/ &{/opp-table-cluster2/opp-1510400000};

nv-platform/tegra234-p3768-0000+p3767-xxxx-nv-common.dtsi

@@ -429,3 +429,5 @@
 		status = "okay";
 	};
 };
+
+/delete-node/ &{/gpio-keys/key-suspend};

overlay/tegra234-p3768-0000+p3767-0000-dynamic.dts

@@ -4,8 +4,6 @@
 /dts-v1/;
 /plugin/;
 
-#include "tegra234-p3768-camera-rbpcv2-imx219.dtsi"
-
 / {
 	overlay-name = "Tegra234 p3768-0000+p3767-xxxx Dynamic Overlay";
 };

overlay/tegra234-p3768-camera-rbpcv2-imx219.dtsi

@@ -1,54 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-// SPDX-FileCopyrightText: Copyright (c) 2023-2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
-
-#define CAM0_RST        TEGRA234_MAIN_GPIO(H, 3)
-#define CAM0_PWDN	TEGRA234_MAIN_GPIO(H, 6)
-#define CAM1_PWDN	TEGRA234_MAIN_GPIO(AC, 0)
-#define CAM_I2C_MUX 	TEGRA234_AON_GPIO(CC, 3)
-
-#include <dt-bindings/tegra234-p3767-0000-common.h>
-#include "tegra234-camera-rbpcv2-imx219.dtsi"
-
-/ {
-	fragment-camera-imx219@0 {
-		target-path = "/";
-		__overlay__ {
-			bus@0 {
-				cam_i2cmux{
-					status = "okay";
-					compatible = "i2c-mux-gpio";
-					#address-cells = <1>;
-					#size-cells = <0>;
-					i2c-parent = <&cam_i2c>;
-					mux-gpios = <&gpio_aon CAM_I2C_MUX GPIO_ACTIVE_HIGH>;
-					i2c@0 {
-						status = "okay";
-						reg = <0>;
-						#address-cells = <1>;
-						#size-cells = <0>;
-						rbpcv2_imx219_a@10 {
-							reset-gpios = <&gpio CAM0_PWDN GPIO_ACTIVE_HIGH>;
-						};
-					};
-					i2c@1 {
-						status = "okay";
-						reg = <1>;
-						#address-cells = <1>;
-						#size-cells = <0>;
-						rbpcv2_imx219_c@10 {
-							reset-gpios = <&gpio CAM1_PWDN GPIO_ACTIVE_HIGH>;
-						};
-					};
-				};
-				gpio@2200000 {
-					camera-control-output-low {
-						gpio-hog;
-						output-low;
-						gpios = <CAM0_RST 0>;
-						label = "cam0-rst";
-					};
-				};
-			};
-		};
-	};
-};