nv-public:P3762: Fix probe fail of Hawks during boot.

1. Made all sensors of Hawks as master sensors so any sensor is capable
to program SERIALIZERS i2c address translation during probe time
i.e first come first basis.So, We wont miss or skip SERIALIZERS i2c trans.
2. Changed i2c bus 8 freq to 400khz

Bug 4510846

Change-Id: Ia627ebd430709efac64ec849b37167c88b5cf012
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3126593
(cherry picked from commit bfb320b8e2e5429fa1eb8d3657899912b2c34d4b)
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3139866
Tested-by: Shubham Chandra <shubhamc@nvidia.com>
Reviewed-by: Shubham Chandra <shubhamc@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Amulya Yarlagadda <ayarlagadda@nvidia.com>

nv-soc/tegra234-soc-display-overlay.dtsi

@@ -176,7 +176,6 @@
 			"dpaux0_reset",
 			"dsi_core_reset",
 			"mipi_cal_reset";
-		hdcp_enabled;
 		status = "disabled";
 		memory-region = <&fb0_reserved>;
 		nvidia,disp-sw-soc-chip-id = <0x2350>;

overlay/tegra234-p3737-camera-p3762-a00-overlay.dts

@@ -177,7 +177,7 @@
 								       <&bpmp TEGRA234_CLK_EXTPERIPH1>;
 								clock-names = "extperiph1", "pllp_grtba";
 								mclk = "extperiph1";
-								channel = "c";
+								channel = "a";
 								has-eeprom;
 								eeprom-addr = <0x40>;
 								reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
@@ -215,7 +215,7 @@
 								       <&bpmp TEGRA234_CLK_EXTPERIPH1>;
 								clock-names = "extperiph1", "pllp_grtba";
 								mclk = "extperiph1";
-								channel = "c";
+								channel = "a";
 								has-eeprom;
 								eeprom-addr = <0x15>;
 								reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
@@ -247,7 +247,7 @@
 								       <&bpmp TEGRA234_CLK_EXTPERIPH1>;
 								clock-names = "extperiph1", "pllp_grtba";
 								mclk = "extperiph1";
-								channel = "c";
+								channel = "a";
 								has-eeprom;
 								eeprom-addr = <0x44>;
 								reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
@@ -279,7 +279,7 @@
 								       <&bpmp TEGRA234_CLK_EXTPERIPH1>;
 								clock-names = "extperiph1", "pllp_grtba";
 								mclk = "extperiph1";
-								channel = "c";
+								channel = "a";
 								has-eeprom;
 								eeprom-addr = <0x46>;
 								reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;

tegra234.dtsi

@@ -806,7 +806,7 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			status = "disabled";
-			clock-frequency = <100000>;
+			clock-frequency = <400000>;
 			clocks = <&bpmp TEGRA234_CLK_I2C9
 				&bpmp TEGRA234_CLK_PLLP_OUT0>;
 			assigned-clocks = <&bpmp TEGRA234_CLK_I2C9>;