common: overlay: Overlays updated per new design

HW addon overlay files on 40-pin header are updated to match the new
design of Jetson-IO tool, which supports multiple headers and SFIOs:
 - 'jetson-header-name' property is specified to associate the
    40-pin header
 - pinctrl phandle is standardized so that overlay from multiple
    headers can be overlaid
 - Pin node names are specified as hdr40-pin## {};

Bug 200581790

Change-Id: I7c32e11e02a2a8d53120beabd14400bed7e0221b
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/platform/tegra/common/+/2420885
(cherry picked from commit f491e1882f225c21ea884fb5173e1514b2eea9ac)
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/platform/tegra/common/+/2533825
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Viswanath L <viswanathl@nvidia.com>
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: Viswanath L <viswanathl@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Viswanath L
2020-09-29 00:24:12 +05:30
committed by Laxman Dewangan
parent b77993bb67
commit 5f0d901138
4 changed files with 31 additions and 27 deletions

View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -23,16 +23,17 @@
/ {
overlay-name = "Adafruit SPH0645LM4H";
jetson-header-name = "Jetson 40pin Header";
compatible = JETSON_COMPATIBLE;
fragment@0 {
target = <&pinmux>;
__overlay__ {
pinctrl-names = "default";
pinctrl-0 = <&hdr40_pinmux>;
pinctrl-0 = <&jetson_io_pinmux>;
hdr40_pinmux: header-40pin-pinmux {
pin12 {
jetson_io_pinmux: exp-header-pinmux {
hdr40-pin12 {
nvidia,pins = HDR40_PIN12;
nvidia,function = HDR40_I2S;
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
@@ -40,7 +41,7 @@
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
pin35 {
hdr40-pin35 {
nvidia,pins = HDR40_PIN35;
nvidia,function = HDR40_I2S;
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
@@ -48,7 +49,7 @@
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
pin38 {
hdr40-pin38 {
nvidia,pins = HDR40_PIN38;
nvidia,function = HDR40_I2S;
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;

View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -22,6 +22,7 @@
/ {
overlay-name = "FE-PI Audio V1 and Z V2";
jetson-header-name = "Jetson 40pin Header";
compatible = JETSON_COMPATIBLE;
fragment@0 {
@@ -95,10 +96,10 @@
target = <&pinmux>;
__overlay__ {
pinctrl-names = "default";
pinctrl-0 = <&hdr40_pinmux>;
pinctrl-0 = <&jetson_io_pinmux>;
hdr40_pinmux: header-40pin-pinmux {
pin12 {
jetson_io_pinmux: exp-header-pinmux {
hdr40-pin12 {
nvidia,pins = HDR40_PIN12;
nvidia,function = HDR40_I2S;
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
@@ -106,7 +107,7 @@
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
pin35 {
hdr40-pin35 {
nvidia,pins = HDR40_PIN35;
nvidia,function = HDR40_I2S;
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
@@ -114,7 +115,7 @@
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
pin38 {
hdr40-pin38 {
nvidia,pins = HDR40_PIN38;
nvidia,function = HDR40_I2S;
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
@@ -122,7 +123,7 @@
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
pin40 {
hdr40-pin40 {
nvidia,pins = HDR40_PIN40;
nvidia,function = HDR40_I2S;
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;

View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -22,6 +22,7 @@
/ {
overlay-name = "MCP251x CAN Controller";
jetson-header-name = "Jetson 40pin Header";
compatible = JETSON_COMPATIBLE;
fragment@0 {
@@ -64,38 +65,38 @@
target = <&pinmux>;
__overlay__ {
pinctrl-names = "default";
pinctrl-0 = <&hdr40_pinmux>;
pinctrl-0 = <&jetson_io_pinmux>;
hdr40_pinmux: header-40pin-pinmux {
pin19 {
jetson_io_pinmux: exp-header-pinmux {
hdr40-pin19 {
nvidia,pins = HDR40_PIN19;
nvidia,function = HDR40_SPI;
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
pin21 {
hdr40-pin21 {
nvidia,pins = HDR40_PIN21;
nvidia,function = HDR40_SPI;
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
pin23 {
hdr40-pin23 {
nvidia,pins = HDR40_PIN23;
nvidia,function = HDR40_SPI;
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
pin24 {
hdr40-pin24 {
nvidia,pins = HDR40_PIN24;
nvidia,function = HDR40_SPI;
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
pin26 {
hdr40-pin26 {
nvidia,pins = HDR40_PIN26;
nvidia,function = HDR40_SPI;
nvidia,pull = <TEGRA_PIN_PULL_UP>;

View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -22,6 +22,7 @@
/ {
overlay-name = "ReSpeaker 4 Mic Array";
jetson-header-name = "Jetson 40pin Header";
compatible = JETSON_COMPATIBLE;
fragment@0 {
@@ -75,10 +76,10 @@
target = <&pinmux>;
__overlay__ {
pinctrl-names = "default";
pinctrl-0 = <&hdr40_pinmux>;
pinctrl-0 = <&jetson_io_pinmux>;
hdr40_pinmux: header-40pin-pinmux {
pin12 {
jetson_io_pinmux: exp-header-pinmux {
hdr40-pin12 {
nvidia,pins = HDR40_PIN12;
nvidia,function = HDR40_I2S;
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
@@ -86,7 +87,7 @@
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
pin35 {
hdr40-pin35 {
nvidia,pins = HDR40_PIN35;
nvidia,function = HDR40_I2S;
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
@@ -94,7 +95,7 @@
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
pin38 {
hdr40-pin38 {
nvidia,pins = HDR40_PIN38;
nvidia,function = HDR40_I2S;
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;