mirror of
git://nv-tegra.nvidia.com/device/hardware/nvidia/tegra-public-dts.git
synced 2025-12-22 09:11:55 +03:00
common: overlay: Overlays updated per new design
HW addon overlay files on 40-pin header are updated to match the new
design of Jetson-IO tool, which supports multiple headers and SFIOs:
- 'jetson-header-name' property is specified to associate the
40-pin header
- pinctrl phandle is standardized so that overlay from multiple
headers can be overlaid
- Pin node names are specified as hdr40-pin## {};
Bug 200581790
Change-Id: I7c32e11e02a2a8d53120beabd14400bed7e0221b
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/platform/tegra/common/+/2420885
(cherry picked from commit f491e1882f225c21ea884fb5173e1514b2eea9ac)
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/platform/tegra/common/+/2533825
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Viswanath L <viswanathl@nvidia.com>
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: Viswanath L <viswanathl@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
committed by
Laxman Dewangan
parent
b77993bb67
commit
5f0d901138
@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@@ -23,16 +23,17 @@
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/ {
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overlay-name = "Adafruit SPH0645LM4H";
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jetson-header-name = "Jetson 40pin Header";
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compatible = JETSON_COMPATIBLE;
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fragment@0 {
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target = <&pinmux>;
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__overlay__ {
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pinctrl-names = "default";
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pinctrl-0 = <&hdr40_pinmux>;
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pinctrl-0 = <&jetson_io_pinmux>;
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hdr40_pinmux: header-40pin-pinmux {
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pin12 {
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jetson_io_pinmux: exp-header-pinmux {
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hdr40-pin12 {
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nvidia,pins = HDR40_PIN12;
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nvidia,function = HDR40_I2S;
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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@@ -40,7 +41,7 @@
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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pin35 {
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hdr40-pin35 {
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nvidia,pins = HDR40_PIN35;
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nvidia,function = HDR40_I2S;
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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@@ -48,7 +49,7 @@
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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pin38 {
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hdr40-pin38 {
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nvidia,pins = HDR40_PIN38;
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nvidia,function = HDR40_I2S;
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@@ -22,6 +22,7 @@
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/ {
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overlay-name = "FE-PI Audio V1 and Z V2";
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jetson-header-name = "Jetson 40pin Header";
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compatible = JETSON_COMPATIBLE;
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fragment@0 {
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@@ -95,10 +96,10 @@
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target = <&pinmux>;
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__overlay__ {
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pinctrl-names = "default";
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pinctrl-0 = <&hdr40_pinmux>;
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pinctrl-0 = <&jetson_io_pinmux>;
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hdr40_pinmux: header-40pin-pinmux {
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pin12 {
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jetson_io_pinmux: exp-header-pinmux {
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hdr40-pin12 {
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nvidia,pins = HDR40_PIN12;
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nvidia,function = HDR40_I2S;
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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@@ -106,7 +107,7 @@
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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pin35 {
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hdr40-pin35 {
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nvidia,pins = HDR40_PIN35;
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nvidia,function = HDR40_I2S;
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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@@ -114,7 +115,7 @@
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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pin38 {
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hdr40-pin38 {
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nvidia,pins = HDR40_PIN38;
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nvidia,function = HDR40_I2S;
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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@@ -122,7 +123,7 @@
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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pin40 {
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hdr40-pin40 {
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nvidia,pins = HDR40_PIN40;
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nvidia,function = HDR40_I2S;
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@@ -22,6 +22,7 @@
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/ {
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overlay-name = "MCP251x CAN Controller";
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jetson-header-name = "Jetson 40pin Header";
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compatible = JETSON_COMPATIBLE;
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fragment@0 {
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@@ -64,38 +65,38 @@
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target = <&pinmux>;
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__overlay__ {
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pinctrl-names = "default";
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pinctrl-0 = <&hdr40_pinmux>;
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pinctrl-0 = <&jetson_io_pinmux>;
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hdr40_pinmux: header-40pin-pinmux {
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pin19 {
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jetson_io_pinmux: exp-header-pinmux {
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hdr40-pin19 {
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nvidia,pins = HDR40_PIN19;
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nvidia,function = HDR40_SPI;
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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pin21 {
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hdr40-pin21 {
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nvidia,pins = HDR40_PIN21;
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nvidia,function = HDR40_SPI;
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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pin23 {
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hdr40-pin23 {
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nvidia,pins = HDR40_PIN23;
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nvidia,function = HDR40_SPI;
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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pin24 {
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hdr40-pin24 {
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nvidia,pins = HDR40_PIN24;
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nvidia,function = HDR40_SPI;
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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pin26 {
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hdr40-pin26 {
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nvidia,pins = HDR40_PIN26;
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nvidia,function = HDR40_SPI;
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@@ -22,6 +22,7 @@
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/ {
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overlay-name = "ReSpeaker 4 Mic Array";
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jetson-header-name = "Jetson 40pin Header";
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compatible = JETSON_COMPATIBLE;
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fragment@0 {
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@@ -75,10 +76,10 @@
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target = <&pinmux>;
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__overlay__ {
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pinctrl-names = "default";
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pinctrl-0 = <&hdr40_pinmux>;
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pinctrl-0 = <&jetson_io_pinmux>;
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hdr40_pinmux: header-40pin-pinmux {
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pin12 {
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jetson_io_pinmux: exp-header-pinmux {
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hdr40-pin12 {
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nvidia,pins = HDR40_PIN12;
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nvidia,function = HDR40_I2S;
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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@@ -86,7 +87,7 @@
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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pin35 {
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hdr40-pin35 {
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nvidia,pins = HDR40_PIN35;
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nvidia,function = HDR40_I2S;
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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@@ -94,7 +95,7 @@
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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pin38 {
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hdr40-pin38 {
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nvidia,pins = HDR40_PIN38;
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nvidia,function = HDR40_I2S;
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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