tegra: hwpm: th500: fixes and reorg of IPs

This patch fixes issues found during testing
and guidance provided by devtools. The following
is changed in this patch:

1. mcf_iobhx and mcf_ocu are merged into a single mcf_soc IP.
2a. c2c is changed from 2 instances to 1.
2b. Remove C2CS0/1 which are the broadcast apertures.
    Also remove the allowlist offset specific to broadcast
    aperture.
3. mss_hub is changed from 1 instance to 8.
4. mss_channel is changed from 1 instance to 32.
5. mc0 perfmux is added to mcf_clink.
6. mcf_core is changed from 1 instance to 8.
7. License headers updated where necessary.
8. c2c allowlist updated to have just the offsets common
   to all links.
9. Added a verbose comment explaining the design of
   th500_hwpm_force_enable_ips()
10. Added back validate_current_config module parameter
    as many systems still don't support fuses.
11. If all F's are read back for a regop in ip_readl(),
    return -ENODEV.

There is a corresponding patch to update the python scripts
that generated many of the C and header files.

Bug 4287384

Change-Id: I8e14b0165dfa1abb9f5e04de577a41f0eb278246
Signed-off-by: Vishal Aslot <vaslot@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3134365
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Eric Lu <ericlu@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>

drivers/tegra/hwpm/include/tegra_hwpm.h

@@ -85,8 +85,7 @@ enum tegra_hwpm_ip_enum {
 	TEGRA_HWPM_IP_NVLRX,
 	TEGRA_HWPM_IP_NVLTX,
 	TEGRA_HWPM_IP_MSS_HUB,
-	TEGRA_HWPM_IP_MCF_OCU,
-	TEGRA_HWPM_IP_MCF_IOBHX,
+	TEGRA_HWPM_IP_MCF_SOC,
 	TEGRA_HWPM_IP_MCF_C2C,
 	TEGRA_HWPM_IP_MCF_CLINK,
 	TEGRA_HWPM_IP_MCF_CORE,
@@ -128,8 +127,7 @@ enum tegra_hwpm_resource_enum {
 	TEGRA_HWPM_RESOURCE_NVLRX,
 	TEGRA_HWPM_RESOURCE_NVLTX,
 	TEGRA_HWPM_RESOURCE_MSS_HUB,
-	TEGRA_HWPM_RESOURCE_MCF_OCU,
-	TEGRA_HWPM_RESOURCE_MCF_IOBHX,
+	TEGRA_HWPM_RESOURCE_MCF_SOC,
 	TEGRA_HWPM_RESOURCE_MCF_C2C,
 	TEGRA_HWPM_RESOURCE_MCF_CLINK,
 	TEGRA_HWPM_RESOURCE_MCF_CORE,