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Author SHA1 Message Date
Vedashree Vidwans
48b63d2e3f tegra: hwpm: t234: update mgbe, display allowlist 
Update register offset allowlist for MGBE and display IPs.

Jira THWPM-14

Change-Id: I63c27e0dfcb6a953ce2a722c9f3106b6ad532495
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2618971
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2021-11-15 07:27:17 -08:00
Vedashree Vidwans
c7db51d6df tegra: hwpm: separate ip_map for t234 
Move ip_maps specific to t234 to a separate file.
This will allow support for multiple chips.
Add new member index_mask to hwpm_resource_aperture structure. The
index_mask will be used to reserve available IP instances.

Jira THWPM-41

Change-Id: Ia20b8d2a176602d8f1d7f077263f66a400c22ee0
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2614690
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2021-11-15 07:27:11 -08:00
Seshendra Gadagottu
99a6e78975 tegra: t234: soc hwpm: set la_clk to 625MHz 
Set la_clk rate to 625MHz. It's default parent
"clk_m" only supports 19.2MHz, set parent clock
to "pllrefe_vcoout_gated" for getting 625MHz.

Bug 3405893

Change-Id: Ifedc55f67f16697f9c0e74dbbc753202c7bc71e7
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2614645
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2021-10-29 18:58:03 -07:00
Vedashree Vidwans
aef209f1f5 tegra: soc_hwpm: update soc_hwpm_release logic 
Update soc_hwpm IP release logic to invoke hwpm_ip_pm only for reserved
perfmons.

Bug 3333031
Bug 3333042

Change-Id: I78ab369b0803de4ca326603fd97b21ea157c2eae
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2614689
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2021-10-29 01:37:17 -07:00
Sahil Mukund Patki
649b353b01 tegra: soc_hwpm: Fix debugfs compilation errors 
The member debugfs_root is only defined in struct tegra_soc_hwpm when
debugfs is enabled. So its use when debugfs is disabled leads to
compilation errors which is seen in function tegra_soc_hwpm_debugfs_init.
This function when debugfs disabled just sets the debugfs_root to NULL.
This has been removed to fix the compilation error.

Bug 200755555

Change-Id: I6e4fa7e330dbe468ba216e98d29d58877e250fa4
Signed-off-by: Sahil Mukund Patki <spatki@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2616087
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2021-10-27 11:58:54 -07:00
Vedashree Vidwans
8c4e714e52 tegra: soc_hwpm: enable available IPs for Si 
Enable below IPs for HWPM on Si
- ISP
- VIC
- OFA
- PVA
- NVDLA
- SCF
- NVDEC
- NVENC
- MSS *

Change-Id: Id35cb48ac5447e5b54ff9066a6f38e3f45e103bf
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2601361
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2021-10-21 02:49:54 -07:00
Vedashree Vidwans
08cf289cbd tegra: hwpm: t234: use autogenerated regops allowlist 
- Replace keyword whitelist with allowlist.
- Update driver to use auto-genrated regops allowlist.
- This will allow support for multiple chips.

Jira THWPM-14

Change-Id: I076ee1b425dfef53650477518c846e9e4d4a9e23
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2605889
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
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 2021-10-21 02:49:49 -07:00
Seshendra Gadagottu
a894ff75c0 tegra: hwpm: register hwpm driver early 
Register hwpm driver early, so that IP drivers
can register with their callbacks with hwpm driver.
For this, tegra_soc_hwpm_init is registered with
postcore_initcall instead of module_init.

Bug 3333031
Bug 3333042

Change-Id: I6d5f2fbc515f15848d9062e8a25a5b296b5f7a27
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2607266
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2021-10-15 16:32:45 -07:00
Seshendra Gadagottu
579bc23ee6 tegra: hwpm: add support for SOC HWPM <-> IP interface 
Add support for IP registering mechanism for runtime
callback and perfmux read/writes.
void tegra_soc_hwpm_ip_register(struct tegra_soc_hwpm_ip_ops *hwpm_ip_ops);

IP's callback are called to disable and enable IP runtime pm.
At this moment, only VIC/NVENC/OFA driver registration is supported.
Also will take-up perfmux register read/write in follow-up patch.

Bug 3333031
Bug 3333042

Change-Id: If559cae73be1edbdb7139b4183ce3e1dc0943053
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2607267
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2021-10-14 17:03:53 -07:00
Seshendra Gadagottu
9b5017b5da tegra: t234: hwpm: set appropriate dma_mask bit 
On t234, 39-bit addressing is supported.
So, set dma_mask bit to 39 on t234.

Bug 200776516

Change-Id: I5240486c2c930605f9dfff708112982572441f84
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2599497
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2021-09-24 03:07:16 -07:00
Vedashree Vidwans
f64c161132 tegra: hwpm: correct pma_enginestatus expected val 
During HWPM release, driver checks PMA engine status before disabling IP
perfmons. Correct the computation of pma engine status expected value.

THWPM-2

Change-Id: I7b0e1497efd67610f6daf39cb1fe411e04eeee11
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2586075
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2021-09-03 20:27:37 -07:00
Vedashree Vidwans
f7fa0cd28f tegra: hwpm: add IP floorsweep info for silicon 
Add floorsweep masks for IPs on silicon. Only verified IPs at the moment
are enabled in the driver.

Bug 3335822

Change-Id: I449d44e4430d273b0680ef9b7f89106df9376d5e
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2585983
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2021-09-03 20:27:31 -07:00
Vedashree Vidwans
818008bdaf tegra: hwpm: Update PMMSYS CG2 SLCG field values 
Update driver release function to write all SLCG fields of PMMSYS CG2
with prod values which enables SLCG for SOC HWPM HW.
Modify driver open function to correctly disable SLCG through all PMMSYS
CG2 fields.

THWPM-2

Change-Id: Id7f725c0cf3f05179295002479f9422cc99a2297
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2585982
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2021-09-03 20:27:24 -07:00
Vedashree Vidwans
93b933c955 tegra: hwpm: move clock-reset assert to func end 
Clock/reset should be disabled/asserted after all register accesses.
Move la and hwpm clk/reset disable/assert to the end of
tegra_soc_hwpm_release().

THWPM-2

Change-Id: I8e71ec5a9251bf76d785d0dc23cc4c8edbb5267f
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2585981
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2021-09-03 20:27:18 -07:00
Vedashree Vidwans
ba34af77a4 tegra: hwpm: update hwpm readl/writel debug prints 
Add dt_aperture address to hwpm readl/writel prints, this helps during
debugs.

THWPM-2

Change-Id: I2be3c9a5e2f023673c96e6f261a73117f0e2c6d4
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2585980
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2021-09-03 20:27:12 -07:00
Vedashree Vidwans
8d085e2f74 tegra: hwpm: fix regops ioctl logic 
IP perfmon base address value is determined by iomap(). This iomap
address is dependent on many factors like platform, carveout, etc.
Currently, soc hwpm user passes static perfmon addresses to execute
reg ops.
Modify hwpm_resource_aperture struct to hold absolute/static start and
end address of the aperture. These new variables will indicate absolute
register range of the aperture.
Modify reg ops ioctl to determine aperture of given phys addr based on
IP's absolute register range.

Bug 3346199

Change-Id: I73b341633d2c780ad0f126ebc609d65cdb7f6cc9
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2564539
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2021-07-29 21:13:51 -07:00
Vedashree Vidwans
3940977659 tegra: hwpm: add floorsweep_info IOCTL 
Add floorsweep_info IOCTL for userspace to query IP instance information
This IOCTL will update the floorsweep_info struct with
- status: valid - query ip_type is valid but IP instances are absent
          invalid - query ip_type is invalid
          exists - query ip_type is valid and IP instances are available
- ip_inst_info: 64-bit mask, where each set bit corresponds to available
          IP instance.

All reserving resources depending on IP floorsweep info.

Bug 3335822
Bug 3338138

Change-Id: Ic593186fd0b25ee8c493722b60120eec3c5c4350
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2562757
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2021-07-29 21:13:45 -07:00
Vedashree Vidwans
6fb6e2e503 tegra: hwpm: add device_info IOCTL 
Add device_info IOCTL for userspace to query current chip's information.
This IOCTL will return a device_info struct with
- chip_id: gives arch id of the chip
- chip_revision: gives chip id revision
- revision: gives major and minor chip revision info
- platform: gives current platform info

Bug 3335823
THWPM-26

Change-Id: I8275a26a812ab7a1b7013ee579f4746d4e5add3d
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2559087
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2021-07-17 01:05:37 -07:00
Vedashree Vidwans
ae2a1e7dfc tegra: hwpm: redraft regops ioctl return status 
- As regops ioctl status is an output from kernel, the status cannot be
invalid. So, remove TEGRA_SOC_HWPM_REG_OP_STATUS_INVALID define.
- Redefine regops ioctl status to make SUCCESS equivalent to value 0.
- Add TEGRA_SOC_HWPM_REG_OP_STATUS_WR_FAILED to indicate failure in
regops write command.

Bug 3335825

Change-Id: I31152f1ce2558fdf4c8829dd19fbcb9c87e20572
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2556234
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2021-07-16 19:56:52 -07:00
Vedashree Vidwans
492dd01e04 tegra: hwpm: enable clock/reset/unpowergate sequence 
Enable clock/reset/unpowergate sequence for silicon.

THWPM-2

Change-Id: I5a9ad97b053b8b8b2409077e99cb206dcc4b544f
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2556233
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2021-07-16 19:56:47 -07:00
Seshendra Gadagottu
5013f24212 tegra: t234: hwpm: make hwpm driver specific to t234 
Change driver compatible string to "nvidia,t234-soc-hwpm".
Make current soc hwpm driver specific to t234 instead of
t23x.

Bug 3341154

Change-Id: I121d9074afc46993514fbb640e7c3ae8e6878827
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2559831
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
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 2021-07-16 16:41:51 -07:00
Vedashree Vidwans
0cb6f6b48f tegra: hwpm: t234: add generated hw headers 
- Generate HWPM hw headers using register generator tool.
- Add required hw headers to include/hw/ path
- Update driver code to replace static hw defines with hw header
definitions.
- Remove unused static hw defines.

THWPM-39

Change-Id: I57566d51657bb6b22c4b581acd257f1871438adf
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2552741
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2021-07-12 23:35:58 -07:00
Seshendra Gadagottu
78465d56ca t23x: hwpm: fix NULL pointer in exec_reg_ops_ioctl 
First do the assignment to reg_op before referring it in
debug print info.

Bug 200702306

Change-Id: Ic0a5ea352793858a746e6fd28759b41e99270be6
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t23x/+/2532594
Tested-by: Vedashree Vidwans <vvidwans@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2021-05-21 20:01:11 -07:00
Seshendra Gadagottu
ce130e224f t23x: hwpm: fix issue in tegra_soc_hwpm_open 
For successful tegra_soc_hwpm_open, return success without
falling through failure case.

Added debug info in tegra_soc_hwpm_open function to
indicate failure case.

Bug 200702306

Change-Id: Ib107d9a89c185d913dc88843e750f36765790bbf
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t23x/+/2532084
Tested-by: Vedashree Vidwans <vvidwans@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
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 2021-05-21 20:00:32 -07:00
Adeel Raza
4e01e6e523 platform: tegra: hwpm: Remove SCF FIXME 
All SCF apertures have been added. Remove the unnecessary FIXME.

Change-Id: Id63ce53a448366a4ba3cdcb60f077d748e5c28be
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t23x/+/2532539
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
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 2021-05-20 21:36:57 -07:00
Adeel Raza
70941decf9 tegra: hwpm: add SOC HWPM driver 
Add a driver for programming the Tegra SOC HWPM path. SOC HWPM allows
performance monitoring of various Tegra IPs.

The profiling tests cases are configured through IOCTLs sent by a
userspace profiling app. The IOCTLs provide the following features:
  - IP discovery and reservation
  - Buffer management
  - Whitelist query
  - Register read/write ops

Bug 200702306
Bug 3305495

Change-Id: I65003b126e01bd03d856767c55aa2424bcfd11fb
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t23x/+/2515148
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2021-05-19 00:33:31 -07:00