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ASoC: tegra-alt: Enable coeff RAM based SFC
This change will 1) Add coeff. RAM tables for few SFC combs 2) Enable coeff. RAM based SFC for mostly used sample rates combinations (P0). Bug 200090046 Change-Id: Ia3b44577103daf3f68b98e76ed63c7e264550145 Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com> Reviewed-on: http://git-master/r/730146 (cherry picked from commit 3cb0a34632178b518852f24adcdb51495cd85674) Signed-off-by: Viraj Karandikar <vkarandikar@nvidia.com> Reviewed-on: http://git-master/r/751857
This commit is contained in:
committed by
Sameer Pujar
parent
b4d16e4951
commit
2e458c2a06
@@ -83,99 +83,6 @@ static int tegra210_sfc_suspend(struct device *dev)
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}
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#endif
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u32 coef_44to48[TEGRA210_SFC_COEF_RAM_DEPTH] = {
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0x000c6102, /*header*/
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0x0001d727, /* input gain */
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0x00fc2fc7, 0xff9bb27b, 0x001c564c,
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0x00e55557, 0xffcadd5b, 0x003d80ba,
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0x00d13397, 0xfff232f8, 0x00683337,
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0x00000002, /* output gain */
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0x00186102, /* header */
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0x000013d9, /* input gain */
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0x00ebd477, 0xff4ce383, 0x0042049d,
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0x0089c278, 0xff54414d, 0x00531ded,
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0x004a5e07, 0xff53cf41, 0x006efbdc,
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0x00000002, /* output gain */
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0x00235204, /* farrow */
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0x000aaaab,
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0xffaaaaab,
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0xfffaaaab,
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0x00555555,
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0xff600000,
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0xfff55555,
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0x00155555,
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0x00055555,
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0xffeaaaab,
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0x00200000,
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0x00005102, /* header */
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0x0001d029, /* input gain */
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0x00f2a98b, 0xff92aa71, 0x001fcd16,
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0x00ae9004, 0xffb85140, 0x0041813a,
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0x007f8ed1, 0xffd585fc, 0x006a69e6,
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0x00000001 /* output gain */
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};
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u32 coef_16to48[TEGRA210_SFC_COEF_RAM_DEPTH] = {
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0x0000a105, /* interpolation + IIR Filter */
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0x00000784, /*input gain */
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0x00cc516e, 0xff2c9639, 0x005ad5b3,
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0x0013ad0d, 0xff3d4799, 0x0063ce75,
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0xffb6f398, 0xff5138d1, 0x006e9e1f,
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0xff9186e5, 0xff5f96a4, 0x0076a86e,
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0xff82089c, 0xff676b81, 0x007b9f8a,
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0xff7c48a5, 0xff6a31e7, 0x007ebb7b,
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0x00000003 /* output gain */
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};
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u32 coef_96to48[TEGRA210_SFC_COEF_RAM_DEPTH] = {
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0x00005102,/* header */
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0x0001d727,/* input gain */
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0x00fc2fc7, 0xff9bb27b, 0x001c564c,
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0x00e55557, 0xffcadd5b, 0x003d80ba,
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0x00d13397, 0xfff232f8, 0x00683337,
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0x00000001 /* output gain */
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};
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u32 coef_48to44[TEGRA210_SFC_COEF_RAM_DEPTH] = {
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0x000c6102,/* header */
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0x0001d029, /* input gain */
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0x00f2a98b, 0xff92aa71, 0x001fcd16,
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0x00ae9004, 0xffb85140, 0x0041813a,
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0x007f8ed1, 0xffd585fc, 0x006a69e6,
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0x00000002, /* output gain */
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0x001b6103, /* header */
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0x000001e0, /* input gain */
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0x00de44c0, 0xff380b7f, 0x004ffc73,
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0x00494b44, 0xff3d493a, 0x005908bf,
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0xffe9a3c8, 0xff425647, 0x006745f7,
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0xffc42d61, 0xff40a6c7, 0x00776709,
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0x00000002, /* output gain */
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0x00265204, /* farrow */
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0x000aaaab,
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0xffaaaaab,
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0xfffaaaab,
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0x00555555,
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0xff600000,
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0xfff55555,
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0x00155555,
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0x00055555,
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0xffeaaaab,
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0x00200000,
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0x00005102, /* header */
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0x0001d727, /* input gain */
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0x00fc2fc7, 0xff9bb27b, 0x001c564c,
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0x00e55557, 0xffcadd5b, 0x003d80ba,
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0x00d13397, 0xfff232f8, 0x00683337,
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0x00000001 /* output gain */
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};
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/**
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* tegra210_sfc_enable_coef_ram - enables coefficient ram params for a sfc
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* @cif : sfc cif
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* @coef : ptr to coefficients (pass NULL while disabling, i.e. when en = 0)
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* @en : enable/disable flag
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*/
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static int tegra210_sfc_set_dai_sysclk(struct snd_soc_dai *dai,
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int clk_id, unsigned int freq, int dir)
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{
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@@ -235,6 +142,124 @@ static int tegra210_sfc_set_dai_sysclk(struct snd_soc_dai *dai,
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return 0;
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}
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static int tegra210_sfc_write_coeff_ram(struct tegra210_sfc *sfc)
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{
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u32 *coeff_ram = NULL;
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switch (sfc->srate_in) {
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case TEGRA210_SFC_FS8:
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if (sfc->srate_out == TEGRA210_SFC_FS48)
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coeff_ram = coef_8to48;
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else if (sfc->srate_out == TEGRA210_SFC_FS44_1)
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coeff_ram = coef_8to44;
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else if (sfc->srate_out == TEGRA210_SFC_FS16)
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coeff_ram = coef_8to16;
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break;
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case TEGRA210_SFC_FS16:
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if (sfc->srate_out == TEGRA210_SFC_FS48)
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coeff_ram = coef_16to48;
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else if (sfc->srate_out == TEGRA210_SFC_FS44_1)
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coeff_ram = coef_16to44;
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else if (sfc->srate_out == TEGRA210_SFC_FS8)
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coeff_ram = coef_16to8;
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break;
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case TEGRA210_SFC_FS44_1:
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if (sfc->srate_out == TEGRA210_SFC_FS8)
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coeff_ram = coef_44to8;
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else if (sfc->srate_out == TEGRA210_SFC_FS16)
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coeff_ram = coef_44to16;
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else if (sfc->srate_out == TEGRA210_SFC_FS48)
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coeff_ram = coef_44to48;
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break;
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case TEGRA210_SFC_FS48:
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if (sfc->srate_out == TEGRA210_SFC_FS8)
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coeff_ram = coef_48to8;
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else if (sfc->srate_out == TEGRA210_SFC_FS16)
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coeff_ram = coef_48to16;
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else if (sfc->srate_out == TEGRA210_SFC_FS44_1)
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coeff_ram = coef_48to44;
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break;
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case TEGRA210_SFC_FS11_025:
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if (sfc->srate_out == TEGRA210_SFC_FS48)
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coeff_ram = coef_11to48;
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else if (sfc->srate_out == TEGRA210_SFC_FS44_1)
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coeff_ram = coef_11to44;
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break;
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case TEGRA210_SFC_FS22_05:
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if (sfc->srate_out == TEGRA210_SFC_FS48)
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coeff_ram = coef_22to48;
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else if (sfc->srate_out == TEGRA210_SFC_FS44_1)
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coeff_ram = coef_22to44;
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break;
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case TEGRA210_SFC_FS24:
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if (sfc->srate_out == TEGRA210_SFC_FS48)
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coeff_ram = coef_24to48;
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else if (sfc->srate_out == TEGRA210_SFC_FS44_1)
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coeff_ram = coef_24to44;
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break;
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case TEGRA210_SFC_FS32:
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if (sfc->srate_out == TEGRA210_SFC_FS48)
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coeff_ram = coef_32to48;
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else if (sfc->srate_out == TEGRA210_SFC_FS44_1)
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coeff_ram = coef_32to44;
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break;
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case TEGRA210_SFC_FS88_2:
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if (sfc->srate_out == TEGRA210_SFC_FS48)
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coeff_ram = coef_88to48;
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else if (sfc->srate_out == TEGRA210_SFC_FS44_1)
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coeff_ram = coef_88to44;
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break;
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case TEGRA210_SFC_FS96:
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if (sfc->srate_out == TEGRA210_SFC_FS48)
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coeff_ram = coef_96to48;
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else if (sfc->srate_out == TEGRA210_SFC_FS44_1)
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coeff_ram = coef_96to44;
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break;
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case TEGRA210_SFC_FS176_4:
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if (sfc->srate_out == TEGRA210_SFC_FS48)
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coeff_ram = coef_176to48;
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else if (sfc->srate_out == TEGRA210_SFC_FS44_1)
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coeff_ram = coef_176to44;
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break;
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case TEGRA210_SFC_FS192:
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if (sfc->srate_out == TEGRA210_SFC_FS48)
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coeff_ram = coef_192to48;
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else if (sfc->srate_out == TEGRA210_SFC_FS44_1)
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coeff_ram = coef_192to44;
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break;
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default:
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pr_err("SFC input rate not supported: %d\n",
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-EINVAL);
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break;
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}
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if (coeff_ram) {
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tegra210_xbar_write_ahubram(sfc->regmap,
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TEGRA210_SFC_AHUBRAMCTL_SFC_CTRL,
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TEGRA210_SFC_AHUBRAMCTL_SFC_DATA,
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0, coeff_ram, TEGRA210_SFC_COEF_RAM_DEPTH);
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regmap_update_bits(sfc->regmap,
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TEGRA210_SFC_COEF_RAM,
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TEGRA210_SFC_COEF_RAM_COEF_RAM_EN,
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TEGRA210_SFC_COEF_RAM_COEF_RAM_EN);
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}
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return 0;
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}
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static int tegra210_sfc_set_audio_cif(struct tegra210_sfc *sfc,
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struct snd_pcm_hw_params *params,
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unsigned int reg)
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@@ -287,15 +312,8 @@ static int tegra210_sfc_in_hw_params(struct snd_pcm_substream *substream,
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regmap_write(sfc->regmap, TEGRA210_SFC_AXBAR_RX_FREQ, sfc->srate_in);
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tegra210_xbar_write_ahubram(sfc->regmap,
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TEGRA210_SFC_AHUBRAMCTL_SFC_CTRL,
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TEGRA210_SFC_AHUBRAMCTL_SFC_DATA,
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0, coef_44to48, TEGRA210_SFC_COEF_RAM_DEPTH);
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regmap_update_bits(sfc->regmap,
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TEGRA210_SFC_COEF_RAM,
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TEGRA210_SFC_COEF_RAM_COEF_RAM_EN,
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TEGRA210_SFC_COEF_RAM_COEF_RAM_EN);
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if (sfc->srate_in != sfc->srate_out)
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tegra210_sfc_write_coeff_ram(sfc);
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return ret;
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}
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