ASoC: tegra-alt: Enable coeff RAM based SFC

This change will
1) Add coeff. RAM tables for few SFC combs
2) Enable coeff. RAM based SFC for mostly used
   sample rates combinations (P0).

Bug 200090046

Change-Id: Ia3b44577103daf3f68b98e76ed63c7e264550145
Signed-off-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-on: http://git-master/r/730146
(cherry picked from commit 3cb0a34632178b518852f24adcdb51495cd85674)
Signed-off-by: Viraj Karandikar <vkarandikar@nvidia.com>
Reviewed-on: http://git-master/r/751857
This commit is contained in:
Manoj Gangwal
2015-04-10 15:44:34 +05:30
committed by Sameer Pujar
parent b4d16e4951
commit 2e458c2a06

View File

@@ -83,99 +83,6 @@ static int tegra210_sfc_suspend(struct device *dev)
}
#endif
u32 coef_44to48[TEGRA210_SFC_COEF_RAM_DEPTH] = {
0x000c6102, /*header*/
0x0001d727, /* input gain */
0x00fc2fc7, 0xff9bb27b, 0x001c564c,
0x00e55557, 0xffcadd5b, 0x003d80ba,
0x00d13397, 0xfff232f8, 0x00683337,
0x00000002, /* output gain */
0x00186102, /* header */
0x000013d9, /* input gain */
0x00ebd477, 0xff4ce383, 0x0042049d,
0x0089c278, 0xff54414d, 0x00531ded,
0x004a5e07, 0xff53cf41, 0x006efbdc,
0x00000002, /* output gain */
0x00235204, /* farrow */
0x000aaaab,
0xffaaaaab,
0xfffaaaab,
0x00555555,
0xff600000,
0xfff55555,
0x00155555,
0x00055555,
0xffeaaaab,
0x00200000,
0x00005102, /* header */
0x0001d029, /* input gain */
0x00f2a98b, 0xff92aa71, 0x001fcd16,
0x00ae9004, 0xffb85140, 0x0041813a,
0x007f8ed1, 0xffd585fc, 0x006a69e6,
0x00000001 /* output gain */
};
u32 coef_16to48[TEGRA210_SFC_COEF_RAM_DEPTH] = {
0x0000a105, /* interpolation + IIR Filter */
0x00000784, /*input gain */
0x00cc516e, 0xff2c9639, 0x005ad5b3,
0x0013ad0d, 0xff3d4799, 0x0063ce75,
0xffb6f398, 0xff5138d1, 0x006e9e1f,
0xff9186e5, 0xff5f96a4, 0x0076a86e,
0xff82089c, 0xff676b81, 0x007b9f8a,
0xff7c48a5, 0xff6a31e7, 0x007ebb7b,
0x00000003 /* output gain */
};
u32 coef_96to48[TEGRA210_SFC_COEF_RAM_DEPTH] = {
0x00005102,/* header */
0x0001d727,/* input gain */
0x00fc2fc7, 0xff9bb27b, 0x001c564c,
0x00e55557, 0xffcadd5b, 0x003d80ba,
0x00d13397, 0xfff232f8, 0x00683337,
0x00000001 /* output gain */
};
u32 coef_48to44[TEGRA210_SFC_COEF_RAM_DEPTH] = {
0x000c6102,/* header */
0x0001d029, /* input gain */
0x00f2a98b, 0xff92aa71, 0x001fcd16,
0x00ae9004, 0xffb85140, 0x0041813a,
0x007f8ed1, 0xffd585fc, 0x006a69e6,
0x00000002, /* output gain */
0x001b6103, /* header */
0x000001e0, /* input gain */
0x00de44c0, 0xff380b7f, 0x004ffc73,
0x00494b44, 0xff3d493a, 0x005908bf,
0xffe9a3c8, 0xff425647, 0x006745f7,
0xffc42d61, 0xff40a6c7, 0x00776709,
0x00000002, /* output gain */
0x00265204, /* farrow */
0x000aaaab,
0xffaaaaab,
0xfffaaaab,
0x00555555,
0xff600000,
0xfff55555,
0x00155555,
0x00055555,
0xffeaaaab,
0x00200000,
0x00005102, /* header */
0x0001d727, /* input gain */
0x00fc2fc7, 0xff9bb27b, 0x001c564c,
0x00e55557, 0xffcadd5b, 0x003d80ba,
0x00d13397, 0xfff232f8, 0x00683337,
0x00000001 /* output gain */
};
/**
* tegra210_sfc_enable_coef_ram - enables coefficient ram params for a sfc
* @cif : sfc cif
* @coef : ptr to coefficients (pass NULL while disabling, i.e. when en = 0)
* @en : enable/disable flag
*/
static int tegra210_sfc_set_dai_sysclk(struct snd_soc_dai *dai,
int clk_id, unsigned int freq, int dir)
{
@@ -235,6 +142,124 @@ static int tegra210_sfc_set_dai_sysclk(struct snd_soc_dai *dai,
return 0;
}
static int tegra210_sfc_write_coeff_ram(struct tegra210_sfc *sfc)
{
u32 *coeff_ram = NULL;
switch (sfc->srate_in) {
case TEGRA210_SFC_FS8:
if (sfc->srate_out == TEGRA210_SFC_FS48)
coeff_ram = coef_8to48;
else if (sfc->srate_out == TEGRA210_SFC_FS44_1)
coeff_ram = coef_8to44;
else if (sfc->srate_out == TEGRA210_SFC_FS16)
coeff_ram = coef_8to16;
break;
case TEGRA210_SFC_FS16:
if (sfc->srate_out == TEGRA210_SFC_FS48)
coeff_ram = coef_16to48;
else if (sfc->srate_out == TEGRA210_SFC_FS44_1)
coeff_ram = coef_16to44;
else if (sfc->srate_out == TEGRA210_SFC_FS8)
coeff_ram = coef_16to8;
break;
case TEGRA210_SFC_FS44_1:
if (sfc->srate_out == TEGRA210_SFC_FS8)
coeff_ram = coef_44to8;
else if (sfc->srate_out == TEGRA210_SFC_FS16)
coeff_ram = coef_44to16;
else if (sfc->srate_out == TEGRA210_SFC_FS48)
coeff_ram = coef_44to48;
break;
case TEGRA210_SFC_FS48:
if (sfc->srate_out == TEGRA210_SFC_FS8)
coeff_ram = coef_48to8;
else if (sfc->srate_out == TEGRA210_SFC_FS16)
coeff_ram = coef_48to16;
else if (sfc->srate_out == TEGRA210_SFC_FS44_1)
coeff_ram = coef_48to44;
break;
case TEGRA210_SFC_FS11_025:
if (sfc->srate_out == TEGRA210_SFC_FS48)
coeff_ram = coef_11to48;
else if (sfc->srate_out == TEGRA210_SFC_FS44_1)
coeff_ram = coef_11to44;
break;
case TEGRA210_SFC_FS22_05:
if (sfc->srate_out == TEGRA210_SFC_FS48)
coeff_ram = coef_22to48;
else if (sfc->srate_out == TEGRA210_SFC_FS44_1)
coeff_ram = coef_22to44;
break;
case TEGRA210_SFC_FS24:
if (sfc->srate_out == TEGRA210_SFC_FS48)
coeff_ram = coef_24to48;
else if (sfc->srate_out == TEGRA210_SFC_FS44_1)
coeff_ram = coef_24to44;
break;
case TEGRA210_SFC_FS32:
if (sfc->srate_out == TEGRA210_SFC_FS48)
coeff_ram = coef_32to48;
else if (sfc->srate_out == TEGRA210_SFC_FS44_1)
coeff_ram = coef_32to44;
break;
case TEGRA210_SFC_FS88_2:
if (sfc->srate_out == TEGRA210_SFC_FS48)
coeff_ram = coef_88to48;
else if (sfc->srate_out == TEGRA210_SFC_FS44_1)
coeff_ram = coef_88to44;
break;
case TEGRA210_SFC_FS96:
if (sfc->srate_out == TEGRA210_SFC_FS48)
coeff_ram = coef_96to48;
else if (sfc->srate_out == TEGRA210_SFC_FS44_1)
coeff_ram = coef_96to44;
break;
case TEGRA210_SFC_FS176_4:
if (sfc->srate_out == TEGRA210_SFC_FS48)
coeff_ram = coef_176to48;
else if (sfc->srate_out == TEGRA210_SFC_FS44_1)
coeff_ram = coef_176to44;
break;
case TEGRA210_SFC_FS192:
if (sfc->srate_out == TEGRA210_SFC_FS48)
coeff_ram = coef_192to48;
else if (sfc->srate_out == TEGRA210_SFC_FS44_1)
coeff_ram = coef_192to44;
break;
default:
pr_err("SFC input rate not supported: %d\n",
-EINVAL);
break;
}
if (coeff_ram) {
tegra210_xbar_write_ahubram(sfc->regmap,
TEGRA210_SFC_AHUBRAMCTL_SFC_CTRL,
TEGRA210_SFC_AHUBRAMCTL_SFC_DATA,
0, coeff_ram, TEGRA210_SFC_COEF_RAM_DEPTH);
regmap_update_bits(sfc->regmap,
TEGRA210_SFC_COEF_RAM,
TEGRA210_SFC_COEF_RAM_COEF_RAM_EN,
TEGRA210_SFC_COEF_RAM_COEF_RAM_EN);
}
return 0;
}
static int tegra210_sfc_set_audio_cif(struct tegra210_sfc *sfc,
struct snd_pcm_hw_params *params,
unsigned int reg)
@@ -287,15 +312,8 @@ static int tegra210_sfc_in_hw_params(struct snd_pcm_substream *substream,
regmap_write(sfc->regmap, TEGRA210_SFC_AXBAR_RX_FREQ, sfc->srate_in);
tegra210_xbar_write_ahubram(sfc->regmap,
TEGRA210_SFC_AHUBRAMCTL_SFC_CTRL,
TEGRA210_SFC_AHUBRAMCTL_SFC_DATA,
0, coef_44to48, TEGRA210_SFC_COEF_RAM_DEPTH);
regmap_update_bits(sfc->regmap,
TEGRA210_SFC_COEF_RAM,
TEGRA210_SFC_COEF_RAM_COEF_RAM_EN,
TEGRA210_SFC_COEF_RAM_COEF_RAM_EN);
if (sfc->srate_in != sfc->srate_out)
tegra210_sfc_write_coeff_ram(sfc);
return ret;
}