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drm/tegra: Add NVENC/NVJPG support on Tegra234

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Add NVENC/NVJPG support on Tegra234. These work similarly to the
ones on Tegra194, so no big changes.

Bug 3778105

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Change-Id: I4a4b12d5625f927c69a6dc1c6b6bade1bca7b171
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2771770
(cherry picked from commit ee6576a1493dae1ddc5c8dc3b415d0987f670390)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2759062
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Tested-by: Jonathan Hunter <jonathanh@nvidia.com>
This commit is contained in:
Mikko Perttunen
2022-08-10 17:09:16 +03:00
committed by Laxman Dewangan
parent 9cfe33dc68
commit 5de571fe8d
1 changed files with 36 additions and 0 deletions
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36
drivers/gpu/host1x/dev.c
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@@ -280,6 +280,42 @@ static const struct host1x_sid_entry tegra234_sid_table[] = {
.offset = 0x34,
.limit = 0x34,
},
{
/* NVENC channel */
.base = 0x17c0,
.offset = 0x30,
.limit = 0x30,
},
{
/* NVENC MMIO */
.base = 0x1690,
.offset = 0x34,
.limit = 0x34,
},
{
/* NVJPG channel */
.base = 0x17d0,
.offset = 0x30,
.limit = 0x30,
},
{
/* NVJPG MMIO */
.base = 0x16a0,
.offset = 0x34,
.limit = 0x34,
},
{
/* NVJPG1 channel */
.base = 0x17a8,
.offset = 0x30,
.limit = 0x30,
},
{
/* NVJPG1 MMIO */
.base = 0x16b0,
.offset = 0x34,
.limit = 0x34,
},
{
/* NVDLA channel */
.base = 0x17e0,