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firmware-api: fix kernel patch validation issues

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Fix some warnings and errors raised by kernel patch validation
and correct some divergence from firmware-api.

Jira CAMERASW-16411

Change-Id: If3ce65b5996d73620d0a730e91a24a4114b7ffd5
Signed-off-by: Mika Liljeberg <mliljeberg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2993559
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3000505
Reviewed-by: Pekka Pessi <ppessi@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Mika Liljeberg
2023-10-09 10:35:33 +03:00
committed by mobile promotions
parent 1a32649b75
commit 71fe53031f
7 changed files with 24 additions and 24 deletions
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2
include/soc/tegra/camrtc-capture-messages.h
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@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2016-2023, NVIDIA Corporation. All rights reserved.
* Copyright (c) 2016-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
*/
/**

26
include/soc/tegra/camrtc-capture.h
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@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2016-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* Copyright (c) 2016-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
*/
/**
@@ -888,6 +888,16 @@ struct engine_status_surface {
uint32_t offset_hi;
} CAPTURE_IVC_ALIGN;
/**
* @brief Watermark offset for specifying address within watermark ring buffer.
*/
struct watermark_mem_offset {
/** Index within watermark buffer */
uint32_t buff_idx;
/** Size of watermark */
uint32_t size;
} CAPTURE_IVC_ALIGN;
/**
* @brief NVCSI error status
*
@@ -1436,16 +1446,6 @@ struct memoryinfo_surface {
uint64_t size;
};
/**
* @brief Watermark offset for specifying address within watermark ring buffer.
*/
struct watermark_mem_offset {
/** Index within watermark buffer */
uint32_t buff_idx;
/** Size of watermark */
uint32_t size;
} CAPTURE_IVC_ALIGN;
/**
* @brief VI capture descriptor memory information
*
@@ -2759,7 +2759,7 @@ struct isp_capture_descriptor {
struct stats_surface h0_surface;
/** Histogram (H1) unit 1 statistics buffer */
struct stats_surface h1_surface;
/** Histogram (H2) unit 2 statistics buffer for ISP7 only */
/** Histogram (H2) unit 2 statistics buffer, for ISP7 only */
struct stats_surface h2_surface;
/** Pixel Replacement Unit (PRU) statistics buffer */
struct stats_surface pru_bad_surface;
@@ -2889,7 +2889,7 @@ struct isp_capture_descriptor_memoryinfo {
struct memoryinfo_surface h0_surface;
/** Histogram (H1) unit 1 statistics buffer */
struct memoryinfo_surface h1_surface;
/** Histogram (H2) unit 2 statistics buffer for ISP7 only */
/** Histogram (H2) unit 2 statistics buffer for ISP7 only*/
struct memoryinfo_surface h2_surface;
/** Pixel Replacement Unit (PRU) statistics buffer */
struct memoryinfo_surface pru_bad_surface;

2
include/soc/tegra/camrtc-channels.h
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@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
*/
/**

2
include/soc/tegra/camrtc-commands.h
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@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
*/
/**

10
include/soc/tegra/camrtc-common.h
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@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
*/
/**
@@ -27,16 +27,16 @@
#define CAMRTC_ALIGN(_n) __attribute__((aligned(_n)))
#endif
#ifndef U64_C
#define U64_C(_x_) (uint64_t)(_x_##ULL)
#define U64_C(_x_) ((uint64_t)(_x_##ULL))
#endif
#ifndef U32_C
#define U32_C(_x_) (uint32_t)(_x_##UL)
#define U32_C(_x_) ((uint32_t)(_x_##UL))
#endif
#ifndef U16_C
#define U16_C(_x_) (uint16_t)(_x_##U)
#define U16_C(_x_) ((uint16_t)(_x_##U))
#endif
#ifndef U8_C
#define U8_C(_x_) (uint8_t)(_x_##U)
#define U8_C(_x_) ((uint8_t)(_x_##U))
#endif
#endif

2
include/soc/tegra/camrtc-dbg-messages.h
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@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
*/
#ifndef INCLUDE_CAMRTC_DBG_MESSAGES_H

4
include/soc/tegra/camrtc-trace.h
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@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
*/
#ifndef INCLUDE_CAMRTC_TRACE_H
@@ -231,7 +231,7 @@ struct camrtc_event_struct {
// camrtc_trace_event_rtos_ids
#define camrtc_trace_rtos_id(_subid) \
CAMRTC_EVENT_MAKE_ID(CAMRTC_EVENT_TYPE_ARRAY, \
CAMRTC_EVENT_MAKE_ID(CAMRTC_EVENT_TYPE_ARRAY, \
CAMRTC_EVENT_MODULE_RTOS, (_subid))
#define camrtc_trace_rtos_task_switched_in \
camrtc_trace_rtos_id(1)