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kmd: Program 4 SCR from KMD in L4T case

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- MB2 cannot program SCR values because PVA is poweredoff
- In L4T, KMD programs some of these SCR registers

Bug 4450663

Change-Id: I8a6fb7cf9c61ad30e9182f520e0122ea8ad49acc
Signed-off-by: Karthik SM <kmaheshwarap@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3068906
Reviewed-by: Arvind Prasad <arvindp@nvidia.com>
Reviewed-by: Mohnish Jain <mohnishj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Karthik SM
2024-02-02 10:13:23 +00:00
committed by mobile promotions
parent 23b905c159
commit b5a59cfff2
2 changed files with 18 additions and 0 deletions
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13
drivers/video/tegra/host/pva/pva.c
View File

@@ -381,6 +381,19 @@ static int pva_init_fw(struct platform_device *pdev)
host1x_writel(pdev,
cfg_priv_ar1_usegreg_r(pva->version),
PVA_EXTRACT64((useg_addr), 39, 32, u32));
if (pdata->version != PVA_HW_GEN1) {
host1x_writel(pdev, evp_scr_r(), PVA_EVP_SCR_VAL | PVA_LOCK_SCR);
host1x_writel(pdev, cfg_scr_priv_0_r(), PVA_PRIV_SCR_VAL | PVA_LOCK_SCR);
host1x_writel(pdev, cfg_scr_ccq_ctrl_r(), PVA_CCQ_SCR_VAL | PVA_LOCK_SCR);
}
/* WAR: Bypass configuring status strl reg due to failure in gen 3 sim test */
if (pdata->version == PVA_HW_GEN2) {
host1x_writel(pdev, cfg_scr_status_ctrl_r(),
PVA_STATUS_CTL_SCR_VAL | PVA_LOCK_SCR);
}
}
/* Indicate the OS is waiting for PVA ready Interrupt */

5
drivers/video/tegra/host/pva/pva_regs.h
View File

@@ -38,6 +38,11 @@
#define PVA_PROC_SCR_PROC_0_VAL (0x39000282U)
/** @} */
/**
* @brief Macro to set lock bit of SCR firewall register.
*/
#define PVA_LOCK_SCR (0x20000000U)
/* Definition for LIC_INTR_ENABLE bits */
#define SEC_LIC_INTR_HSP1 0x1
#define SEC_LIC_INTR_HSP2 0x2