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ASoC: asrc: clear asrc interrupt twice

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As per HW Bug 200208400 we need to clear asrc
interrupt twice to update interrupt status
register.

Bug 200219757

Change-Id: I741f27cca155e45f0112f505eed415852f13e219
Signed-off-by: Dipesh Gandhi <dipeshg@nvidia.com>
Reviewed-on: http://git-master/r/1233840
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nitin Pai <npai@nvidia.com>
This commit is contained in:
Dipesh Gandhi
2016-10-10 11:02:51 +05:30
committed by Sameer Pujar
parent 18fdaccd7a
commit e66ce07df1
1 changed files with 10 additions and 0 deletions
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10
sound/soc/tegra-alt/tegra186_asrc_alt.c
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@@ -201,6 +201,11 @@ static int tegra186_asrc_runtime_resume(struct device *dev)
regmap_write(asrc->regmap, TEGRA186_ASRC_GLOBAL_INT_CLEAR,
0x01);
#if defined(CONFIG_TEGRA186_ASRC_INT_CLEAR_WAR)
/* Hw Bug:200208400 - asrc interrupt status gets cleared when
it is cleared twice */
regmap_write(asrc->regmap, TEGRA186_ASRC_GLOBAL_INT_CLEAR, 0x1);
#endif
for (lane_id = 0; lane_id < 6; lane_id++) {
if (asrc->lane[lane_id].ratio_source == RATIO_SW) {
regmap_write(asrc->regmap,
@@ -1078,6 +1083,11 @@ static void tegra186_asrc_ahc_cb(void *data)
regcache_cache_bypass(asrc->regmap, true);
regmap_write(asrc->regmap, TEGRA186_ASRC_GLOBAL_INT_CLEAR, 0x1);
#if defined(CONFIG_TEGRA186_ASRC_INT_CLEAR_WAR)
/* Hw Bug:200208400 - asrc interrupt status gets cleared when
it is cleared twice */
regmap_write(asrc->regmap, TEGRA186_ASRC_GLOBAL_INT_CLEAR, 0x1);
#endif
regmap_write(asrc->regmap, TEGRA186_ASRC_GLOBAL_ENB, 0x0);
udelay(100);
regmap_write(asrc->regmap, TEGRA186_ASRC_GLOBAL_ENB, 0x1);