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drivers: nvadsp: Disable MBX empty intr at config

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MBOX empty interrupt line is high by default; configuring AGIC line
in this state is undefined behaviour. Fix this by disabling the
interrupt at source and enabling it only after unmasking in AGIC.

Immediately upon unmasking one empty interrupt will be raised, which
must be ignored.

Bug 3432474

Change-Id: I03a26f061bb28b616626bb07153b0263540d7bd9
Signed-off-by: Viswanath L <viswanathl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2672095
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Dipesh Gandhi <dipeshg@nvidia.com>
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Viswanath L
2022-02-22 07:16:02 +00:00
committed by Laxman Dewangan
parent 7835064bc3
commit f90d551e16
3 changed files with 11 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/platform/tegra/nvadsp/dev.c
View File

@@ -572,6 +572,7 @@ static struct nvadsp_chipdata tegrat18x_adsp_chipdata = {
.hwmbox5_reg = 0X28000,
.hwmbox6_reg = 0X30000,
.hwmbox7_reg = 0X38000,
.empty_int_ie = 0x8,
},
.adsp_shared_mem_hwmbox = 0x18000, /* HWMBOX3 */
.adsp_thread_hwmbox = 0x20000, /* HWMBOX4 */

1
drivers/platform/tegra/nvadsp/dev.h
View File

@@ -135,6 +135,7 @@ struct nvadsp_hwmb {
u32 hwmbox5_reg;
u32 hwmbox6_reg;
u32 hwmbox7_reg;
u32 empty_int_ie;
};

10
drivers/platform/tegra/nvadsp/hwmailbox.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2014-2022, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -188,6 +188,9 @@ static irqreturn_t hwmbox_send_empty_int_handler(int irq, void *devid)
uint32_t data;
int ret;
if (!is_hwmbox_busy)
return IRQ_HANDLED;
spin_lock_irqsave(lock, lockflags);
data = hwmbox_readl(send_hwmbox());
@@ -283,6 +286,7 @@ int nvadsp_setup_hwmbox_interrupts(struct platform_device *pdev)
{
struct nvadsp_drv_data *drv = platform_get_drvdata(pdev);
struct device *dev = &pdev->dev;
u32 empty_int_ie = drv->chip_data->hwmb.empty_int_ie;
int recv_virq, send_virq;
int ret;
@@ -294,9 +298,13 @@ int nvadsp_setup_hwmbox_interrupts(struct platform_device *pdev)
if (ret)
goto err;
if (empty_int_ie)
hwmbox_writel(0x0, send_hwmbox() + empty_int_ie);
ret = devm_request_irq(dev, send_virq, hwmbox_send_empty_int_handler,
IRQF_TRIGGER_RISING,
"hwmbox1_send_empty", pdev);
if (empty_int_ie)
hwmbox_writel(0x1, send_hwmbox() + empty_int_ie);
if (ret)
goto free_interrupts;