When PCIe link is disabled or secondary bus reset is done by RP,
EP LTSSM state goes to link disable or hot reset respectively.
Update the LTSSM state check accordingly to support link disable
and secondary bus reset.
XTL_EP_PRI_BAR_CONFIG and XTL_EP_PRI_RESIZE_BAR1 are part of
hot reset domain, when link is going through hot reset, these
registers are not accessible. So, remove these register programming
in tegra264_pcie_ep_clear_bar(). After hot reset these registers
come back with reset values.
Bug 4712053
Change-Id: Ieaf37ed9fed6722db8a16027947121b1cfd1ef4c
Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/3163927
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
When XDMA error is observed driver resets the XDMA engine.
xdma_ll_ch_init() function is called to reinitialize the
XDMA engine. Incorrect value is passed as the argument for
channel type. Fix this issue by using correct variable for
channel type.
Bug 4707453
Change-Id: Ic06563d599bfd7c0979c9db0a20cebeaa18fe3c8
Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/3163925
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
The pci_epc_features structure was updated in Linux v6.9 to move various
fields under a new pci_epc_bar_desc structure. Use conftest to determine
if the new pci_epc_bar_desc structure is present.
Finally, add the endpoint alignment for the inbound ATU on Tegra264
which is 64kB.
Bug 4627271
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Change-Id: I074e19ca53cea0e13d9872b240a023dd83779ae7
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/3129630
Reviewed-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
The only functions needed from the private pci.h header are
pci_dev_is_disconnected() and of_get_pci_domain_nr().
Starting with Linux v6.9, pci_dev_is_disconnected() has been moved to
the public header and now the private header conflicts with the public
due to multiple definitions. It is better to remove the private pci.h
header file and backport the upstream change that moves the definition
of pci_dev_is_disconnected() to the public header.
With regard to the function of_get_pci_domain_nr(), just declare an
extern for the function prototype in the driver file rather than
copying the entire kernel header.
Bug 4471899
Change-Id: I10e7c3c6a92e9ba87153b2682cc3e69ced8c1a31
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/3117272
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Per PCIe r5.0, 6.6.1 wait for 100 ms after DLL up. Optimize PCIe link up
poll logic. Add resume_noirq() callback back function in PCIe driver and
call tegra264_pcie_init() to deassert PERST# and get PCIe link up.
Also, fix minor coding style issues.
Bug 4404453
Change-Id: Iad2d22166eb0c80a20b74ada2ee2766f8d3e174f
Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/3107413
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Remvoe the existing makefile as preparation to merge T264 specific
PCIE drivers into core repo.
Bug 4911768
Change-Id: Ifa65e36b5253bf2dc4ab62fe8caaf10a53e7cff3
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
- Move chip data from patch files to dev-*.c files for
ease of maintenance
- Add patch file to patch compatible and chip data into
dev.c file, also add dev-*.c files to build makefile
- Add stub for dump_core_state function pointer
- ADSP updates
- Use AMISC base directly from reg DT prop as it will
be offset as per the DSP instance (drop adsp_prid)
- Set amc_not_avlbl to true for ADSP[1], so only ADSP[0]
will access AMC
- Change compatible of ADSP[0] to "nvidia,tegra264-adsp"
in order to keep continuity with previous chip
generations (unique identifier string is "adsp")
Also remove T264 adsp support from kprev.
Bug 3682950
Bug 4165898
Change-Id: I22abf3fda01f4e0e259759ba1816a9580a474d40
Signed-off-by: Viswanath L <viswanathl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/3107870
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-by: Asha T <atalambedu@nvidia.com>
Do not build PVA for android kernel as this is not
required for Android.
Bug 4911768
Change-Id: Ibc35c074a8a340afa57cd634e00399e408a416fb
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
In RRA mode, HWSEQ buffer should be validated for each frame.
However, at present, the validation is being done only for
the first frame. Fix this.
Also, record which descriptors will be used in RRA mode as this
information is needed elsewhere in the driver.
Bug 4245426
Change-Id: Ibe572f43350faba27f2e973d6e39ac6e6a4ad1c9
Signed-off-by: abhinayaa <abhinayaa@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/2988532
Reviewed-by: Amruta Sai Anusha Bhamidipati <abhamidipati@nvidia.com>
Reviewed-by: Omar Nemri <onemri@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
- T26x support 304 ADBs compared to 272 on T23x. Add code to support
this distinction.
- T26x introduces the following updates to HWSEQ:
- a new HWSEQ mode - Random Region Access (RRA).
- increased HWSEQ RAM size of 2KB.
Add code to support these changes.
Jira PVAAS-13252
Change-Id: I92d65524b526eda1be8f8dc81dc4e41d0db7f488
Signed-off-by: abhinayaa <abhinayaa@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/2926761
Reviewed-by: Sreehari Mohan <sreeharim@nvidia.com>
Reviewed-by: Amruta Sai Anusha Bhamidipati <abhamidipati@nvidia.com>
Reviewed-by: Omar Nemri <onemri@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
- T26x supports upto 96 descriptors. Add a new macro to support this.
- Add a new macro to support the number of channels in T26x.
Note that in T26x, the reserved descriptors are at indices 60-63 as
is also the case in other PVA generations. Since the reserved
descriptors are not at the end of the descriptor range in T26x,
special handling of descriptors is needed to ensure that the
reservered descriptors are not patched or linked to.
Jira PVAAS-13252
Change-Id: I2543aa4645a72d1c737baae4dcb3405eb879c0ae
Signed-off-by: abhinayaa <abhinayaa@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/2926759
Reviewed-by: Sreehari Mohan <sreeharim@nvidia.com>
Reviewed-by: Amruta Sai Anusha Bhamidipati <abhamidipati@nvidia.com>
Reviewed-by: Omar Nemri <onemri@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
To apply the T264 PVA drivers cleanly, remove the Makefile
of PVA as the content will be provided from patch.
Bug 4911768
Change-Id: Iafdc13f79a851076279c248e5ca9a0a9e9a0128e
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
-Created nvmap_debug.c and nvmap_debug.h with moving debug related
code from nvmap_dev to nvmap_debug.
-Refactor code to have all debugfs creation in one function and
call it from nvmap_dev. Same for debugfs removal.
-Build nvmap_debug only when CONFIG_DEBUG_FS is enabled.
JIRA TMM-5721
Change-Id: Ib6482be63bdd56c7ff09804c7b1edaa6e4cf2f21
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3226784
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Ketan Patil <ketanp@nvidia.com>
In Linux v6.12 the definition 'no_llseek' was finally removed. Since
Linux v6.0 it had been redefined as NULL. Add a test to conftest to
determine if 'no_llseek' is present and if not then it is no longer
necessary to populate this and we can leave as NULL.
Bug 4876974
Change-Id: I051fdb285b32260b5913dad89cabe0be04253f67
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3222106
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Since K519+, frequency table and max_state information is stored in the
devfreq struct directly, not in the devfreq_dev_profile struct. Use
nvidia conftest to conditionally build the governor and choose the
correct data structure for accessing the information.
Kernel build won't complain anything when build the governor, but when
the devfreq driver (e.g. nvgpu) trying to add the devfreq device
with the nvhost_pogdov governor, it will fail to add the devfreq
device since the frequency table information is NULL in the
devfreq_dev_profile and the governor use the wrong information.
Bug 4883576
Change-Id: I885bc4ceac885eea5644416b6eacefbbea523a2b
Signed-off-by: Johnny Liu <johnliu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3229870
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Align Linux FSYNC functionality to QNX non-safety by
adding two non-safety public interfaces to the FSYNC
Kernel Driver to stop and reconfigure FSYNC groups and
their generators.
Also removes individual nodes exposed for each fsync
group and instead accepts group ID as a parameter to
align with QNX functionality and allow configurability
for default group
The design of this feature is documented in Confluence:
CAMERA/FSYNC Reconfiguration for Crosstraffic Cameras
Jira CAMERASW-22038
Change-Id: I3570cd11f62f807464589677c449e899a49f98fc
Signed-off-by: kevixie <kevixie@nvidia.com>
(cherry picked from commit cca0c2364824b025daf2cabc393878907abe03e4)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3196632
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3202934
Reviewed-by: Shiva Dubey <sdubey@nvidia.com>
Reviewed-by: Mohit Ingale <mohiti@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Vincent Chung <vincentc@nvidia.com>
- Add nvmap_dev.h file which include declaration for functions and data
structs which are exposed by nvmap_dev unit to other units.
- Also, add nvmap_dev_int.h file which include declaration for
functions which are internal to nvmap_dev unit that can be called by
files within nvmap_dev unit.
- Move definition of nvmap_handle_get_from_id, nvmap_install_fd,
find_range_of_handles to nvmap_handle.c as they belong to nvmap_handle
unit.
- Cleanup nvmap_priv.h by moving all relevant items for nvmap_dev unit
to nvmap_dev unit.
- Remove nvmap_mm.c file as nvmap_zap_handle is the only function
present; move it to nvmap_cache.c where it's being called.
- Remove function declarations whose definition are not present.
JIRA TMM-5694
JIRA TMM-5730
Change-Id: Ifd45235076da2ef0c628f3179d828c0ccadf6df2
Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3223994
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
CL 2916412 added a spin loop in Host1x Syncpoint Wait driver to detect
syncpoint threshold expiry condition for the tasks expected
to be completed in a very short time. The objective of this change
was to avoid the creation of Host1x dma fence for very short syncpoint
waits. The downside of this change is adding an extra 5usec penalty
for unexpired syncpoint wait causing perf regression.
This reverts CL 2916412.
Bug 4803002
Change-Id: Ib543a06f4bc3c56123c19375d332b58da650680d
Signed-off-by: Mainak Sen <msen@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3217067
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
