As part of upstream alignment all drivers are moved to "tegra" path and
"utils/tegra210_xbar_utils_alt.c" is no more used now. Hence this patch
removes this source file. The helper functions are already moved to AHUB
driver. Currently there are other files related to ISO BW manager, ADSP
audio and FPGA in "tegra-alt" path. These will be cleaned up in subsequent
patches.
Bug 2845498
Change-Id: Iee52eb71bbc3c1996ea75777d3806ef76652848c
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-5.4/+/2307646
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
There seems to be kernel panic happening when rt5659_set_jack_detect()
is called from the machine driver.
For now the jack detection is disabled to unblock 5.4 bringup and
can be separately tracked. A FIXME item is put. Once the issue is
resolved this patch can be reverted.
Bug 2845498
Change-Id: Ieb67e783a1dbcfb9ebbeb2bf301a818c94e38457
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
DAI link structure has changed in 5.4 and memory needs to be allocated
for DAI link cpu/codec/platform components. The same is done with the
current patch to avoid the crash.
Bug 2845498
Change-Id: I2d69517120b6debbd0bb8d6a51ab9c5f6d47a401
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
This patch enables Tegra machine driver used on Jetson platform.
Tegra210 and later Jetson platforms use the same machine driver.
Following is the summary from the patch:
* Enable the driver build in defconfig
* Remove "tegra-alt" ASoC utility file
* Renmae "tegra-alt" parser source file "tegra_asoc_dt_parser.c"
to "tegra_asoc_machine.c" and move it to "tegra" directory.
* Similarly "tegra_asoc_machine_alt.h" is renamed to
"tegra_asoc_machine.h" and moved to "tegra".
* Updated "tegra" ASoC utility files for supporting Tegra210 and
later.
* Rename machine driver file.
* The older parsing code is removed.
Bug 2845498
Change-Id: I42d9d2da59febb99ce00a29ce65d7a16f96b1327
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Following AHUB modules are considered as part of this series. This updates
all drivers to use component structure. Initially AHUB, I2S, DMIC, DSPK
and ADMAIF drivers were updated.
FPGA code is removed from the related drivers. This can be cherry-picked
if it is really required.
Bug 2845498
Change-Id: Ia3f60257c225d281d86ad83325fb517969259cb4
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
For upstream initially ADMAIF and I/O modules are considered. And the
these drivers are rebased in previous commit. This patch tracks the
addition of DAIs in AHUB driver which are needed for other AHUB modules.
Bug 2845498
Change-Id: I16e04a3bcf1118d66a57da2db07c3155ec9fe1a3
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
AHUB and few components have been pushed for upstream review. Though the
changes are still under review, we can leverage the work done on upstream
5.x and use the same here on 5.4 kernel. This helps to align the downstream
code. Any changes that happen because of upstream review can be cherry
picked here. If we plan for any downstream changes, upstream patch needs to
be pushed to keep the code in sync.
As of today current snapshot is pulled from v3 of AHUB series,
http://patchwork.ozlabs.org/project/linux-tegra/list/?series=159664
Above series was worked on later versions of linux-next and hence following
are the changes required for porting back on 5.4
* tegra_pcm_new() and tegra_pcm_free() are exposed from tegra_pcm.c and
component driver callbacks use these.
* Callback functions required for snd_pcm_ops in component driver are
implemented by tegra_pcm.c
* With this ADMAIF driver need not register platform device with ASoC
core.
For components (AHUB, ADMAIF, I2S, DMIC and DSPK) the downsream code
differs in few aspects from the code that was pushed for v3. Some of them
are listed below.
* I2S driver in downstream implements startup()/shutdown() calls for DAI,
which does some setup related to pinconfig and regulators. The same is
true for DMIC and DSPK drivers as well.
* Downstream ADMAIF drivers makes bandwidth requests in startup/shutdown()
calls and has helper function for dumping registers. It also has
additional DAI interfaces which are used for ADSP audio.
* Downstream AHUB driver has DAI interfaces for connecting to all other
modules.
These differences will be cherry-picked as and when it is necessary.
Bug 2845498
Change-Id: Id374967ecae26f6b7334a959fb23308d383c15f2
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Tegra210 and later audio drivers have been using 'tegra-alt' directory
from the beginning. As per the upstream roadmap, we plan to use the
same 'tegra' directory and place all the drivers under it. This patch
thus moves all the drivers to 'tegra' and renames the files accordingly.
The '_alt' suffix is removed from header and source files.
For some files still the '_alt' suffix is retained because 'tegra'
already has the corresponding files. Manual merge of following files is
needed and will be done in separate commits.
* tegra_asoc_utils_alt.c and tegra_asoc_utils.c
* tegra_asoc_utils_alt.h and tegra_asoc_utils.h
* tegra_pcm_alt.c and tegra_pcm.c
* tegra_pcm_alt.h and tegra_pcm.h
* Corresponding Makefile and Kconfig files.
* Source files related to ADSP audio, FPGA, bandwidth manager are not
considered at the moment and will be tracked separately.
Bug 2845498
Change-Id: I51dae3971c72b58d921dc19f0553a83422fd3f9e
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
AHUB clock currently uses pll_a_out0 derivative clock from plla source
but the max frequency for pll_a_out0 was limited to ~49MHz to derive
all possible clock rates for i2s sampling rates. This limits the AHUB
clock rate to be used at peak possible rate for ahub which can help in
some high bandwidth usecase. Considering this AHUB rate can be derived
from PLLP clock to support max possible rate for AHUB.
Making use of assigned-clock-rates and assigned-clock-parents to set the
desired settings as per dvfs table for a given platforms.
Bug 200537672
Change-Id: Ica556fc68456b52516c82b6601b54cae0b5d1b73
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2204283
(cherry picked from commit add574aa21b447b61391f51650fe52175190064b)
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Change-Id: I655337be86d37b05843a9a9b4238001779653eeb
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2280448
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Following print is seen while using regmap_read_poll_timeout() macro
in snd_soc_dai_ops trigger() callback in ADMAIF driver,
*** BUG: scheduling while atomic ***
and kernel panic happens there after. This happens because above macro
is not atomic safe and trigger() is called in atomic context.
Earlier this addressed by using readx_poll_timeout_atomic() macro.
Though this works fine driver needs to keep a reference to base address.
To avoid this new macro was pushed and is accepted in upstream and
following is the commit - https://lkml.org/lkml/2020/1/9/985
This patch makes use of regmap macros where there is a need of timeout
functionality. Following is the guideline that can be followed.
* use regmap_read_poll_timeout_atomic() where the caller is in atomic
context.
ex: trigger() etc.,
* use regmap_read_poll_timeout() when the caller is known to be running
in non-atomic context.
ex: hw_param(), prepare() etc.,
Based on this audio drivers are updated. ASRC and ARAD drivers will be
taken up in a separate change.
Bug 200566596
Change-Id: Iea88adc60de5919e456a36a30152212652a8ecd3
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2274874
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This patch optimizes following functions on the usage of local
variables and removal of redundant loops, thus making these
functions more readable.
* tegra_xbar_get_value_enum()
* tegra_xbar_put_value_enum()
Bug 200503387
Change-Id: I32989d0cf46ad50bf47a0127bac1eb7c1ed32ff2
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2268611
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Viswanath L <viswanathl@nvidia.com>
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
S24_LE is a 32-bit container with 24-bit data in LSBs, with zeroes in
most significant byte. S32_LE can act as 32-bit container for 24-bit
data where data is pushed to MSBs and zeroes are filled in least
significant byte. For example below is how the data is represented
for different containers, where 'abc' is 24-bit data.
0abc (S24_LE)
abc0 (S32_LE)
As per IAS, most significant bits are pushed first when data moves
in AHUB. For any down conversion LSBs are discarded, where as for any
up conversion, zeroes are filled in the LSBs. Hence extraction of
S24_LE results in data loss. Mentioned below are some of the examples
to illustrate this.
Consider for playback path, where data flow is from memory to AHUB and
its clients, where 'abc' is valid data and 'x' is to ignore.
* S32_LE
abc0 --> audio = 32, client = 32 --> abc0
abc0 --> audio = 32, client = 24 --> abcx
abc0 --> audio = 32, client = 16 --> abxx
* S24_LE
0abc --> audio = 32, client = 32 --> 0abc
0abc --> audio = 32, client = 24 --> 0abx (data loss)
0abc --> audio = 32, client = 16 --> 0axx (data loss)
Thus this patch removes S24_LE format from the drivers since Tegra audio
HW is not designed to support this. Also S24_LE is not a commonly used
format.
Bug 200568187
Change-Id: I778d2f70527c17f00728fce75fe152d902c5aaa0
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2264822
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Viswanath L <viswanathl@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
XBAR related code is currently put under source files "tegra210_xbar_alt.c"
and "tegra210_xbar_utils_alt.c". For upstream we are planning to use a
single source file. Thus code in downstream is re-organized so that all
XBAR code is moved under a single file.
Following is the summary of changes,
* All XBAR specific code is moved under,
"tegra210_xbar_alt.c" and "tegra210_xbar_alt.h"
* Only common code, which is required for other modules, remains in
"tegra210_xbar_utils_alt.c"
* unused macros or functions are removed
Bug 200503387
Change-Id: I11cb93d3cdc07e14ef2e0b3b23ba6a98020a0373
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2265584
GVS: Gerrit_Virtual_Submit
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Currently in downstream,
* we pass FSYNC width from DT for LRCK and FSYNC modes. We also have a
mixer control to override the width. If the property is missing a
default width of "31" is set.
* DT property, "enable-cya", is used on Tegra210 to enable pad controls
for I2S4. This is not required for other instances of I2S on Tegra210
and not required for any instance on Tegra186/Tegra194.
With current patch,
* DT property "fsync-width" is removed
- LRCK mode does not require FSYNC width to be configured.
- Reset value (one-bit-clock wide) is what we are using for DSP modes.
- If specific width needs to be configured, mixer control is already
available. Generally for FSYNC modes, the width depends on the codec
and in such cases mixer control is helpful.
* DT property "enable-cya" is removed
- By default the corresponding bit is enabled.
- For other instances of I2S on Tegra210 and for any instance on
Tegra186/Tegra194, this bit is unused.
* updated the channel that needs to be used for CIF and I2S control.
For example, for CIF configuration audio channels is used and
for BCLK rate or channel bit count calculation, client channel is
used.
* helper function tegra210_i2s_set_timing_params() is added to program
I2S clock and timing related registers.
* I2S global enable is moved to default list. The enable status on TX/RX
channel is controlled via DAPM widget.
Bug 200503387
Change-Id: Iafe62e8816f6d8702a325c8466d6b6fda5514d66
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2244478
GVS: Gerrit_Virtual_Submit
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Currently CIF channels are overridden based on mono/stereo settings.
This can be problematic for multi-channel use cases or the cases where
user is intentionally overriding channels through mixer control. In such
cases hard coding based on CIF mono/stereo settings can result in wrong
behavior.
Following are the changes in current patch,
* Decouple CIF mono/stereo and CIF channel settings. It means that, user
can override audio channels and CIF settings independently. Also these
controls are provided for both playback and capture paths.
* For ADMAIF, channel overrides are provided for both audio and client
channels in both playback and capture paths.
* For I2S, separate channel overrides for client channels is not needed
in playback and capture paths. Hence a common client channel override
control is provided. However for audio channels it is similar to the
controls provided for ADMAIF.
* Similar to channels, for I2S, audio bit format control is updated and
provided separate controls in playback and capture paths.
* "None" option is removed for mono/stereo to match HW register spec.
Earlier channel was hard coded based on this.
* For I2S, audio channels are used for CIF configuration and for the slot
control client channels are used (earlier audio channels were getting
used for slot control)
* For upstream, we are standardizing mixer control names. For now, only
relevant controls are updated. Going forward we need to take similar
approach for all controls/modules. This needs to be reflected in
test scripts and documentation as well.
Bug 200503387
Change-Id: I04df9a3bda41e028edc46e86ecd1d80966bc83e1
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2244477
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
ADMAIF may hit timeout in closing sequence, if some bits remain
unconsumed in FIFO, which may happen if the sink gets closed/blocked
ahead of source. As such the status register of ADMAIF remaining
uncleared is not a catastrophic error and the channel will be
available after reset, hence timeout merits a warning print.
Above issue gets hit in two test scripts:
- tegra-audio-amx-to-adx.sh, where closing aplay at any one input
port of AMX causes the module to block other substreams. This
is a HW bug, fixed in T194 upwards.
- tegra-audio-admaif-testsuite.sh, where running aplay and arecord
without any flow control does not ensure that aplay always drains
its bits.
The warning print here, in playback path, is whitelisted for GVS runs.
Bug 200569324
Change-Id: I12984d08c6f43f41f3b85bb066d42b6883249060
Signed-off-by: Viswanath L <viswanathl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2258180
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
For AHUB modules instance number is passed with a DT property. For example,
"nvidia,ahub-i2s-id" property is used in I2S nodes. Similarly other modules
use "nvidia,ahub-<module>-id" property, where <module> is "dmic" or "dspk"
or other corresponding module names. With DAI links in DT now, this is not
required any more. Hence the parsing code for such properties is removed.
Bug 200503387
Change-Id: Ia372044ebecfe090668953b8da81028c63812a4f
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2146859
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Currently we maintain auxdata structure for Tegra210 and Tegra186. This
is nothing but a lookup table used for device names and platform data.
It is used to override device names when creating devices from DT. Since
we have moved all DAI links to DT and no more we rely on device names,
automatically generated device names should be good enough. Hence this
patch removes auxdata table and dev_set_name() calls from XBAR, AMX
drivers.
Some of the embedded platforms are using older machine utility code,
which are using these names. Hence the utility code is also updated to
use automatically generated device names.
Bug 200503387
Change-Id: I80c4fb3a5927001f58a54ca90437ec67ed14bf54
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2258385
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Machine DAPM widgets are currently defined in the driver and are used
to connect to DAPM input/output widgets of external codecs. This routing
map is exposed from DT. Since the machine driver is common to multiple
platforms, all widgets defined in the driver are not always required.
Instead of statically defining the widgets in the driver, these can be
exposed from DT. Any platform DT can then add required number of widgets
and can define a corresponding routing map.
This patch removes the static array for DAPM widgets and instead helper
function, snd_soc_of_parse_audio_simple_widgets(), is used to populate
given DAPM widgets for the sound card.
Bug 200503387
Change-Id: I8ff9f0d52e3c1cc10b6ab1682d05a7b7ef7e2684
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2257383
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Currently we are using static DAI links in machine-utils code and there
are some drawbacks associated with it.
* All DAI links are enabled, even though if a platform does not require.
For ex: ALSA ring buffers are allocated for all the ADMAIF PCM links.
Some platforms might want to enable a very few links, which is not
currently possible with static array in the driver code.
* No way to disable specific modules from DT. For example if any of the
module instances are disabled, sound card registration fails.
* CPU and CODEC names are hard coded in the DAI link arrays. With this
we need to pass instance-id properties from DT to identify or match
the correct instance names.
* One of the other concerns is about latency, where some platform want
to optimize this by only enabling required links.
Above issues can be addressed with DT based DAI links and going ahead
plan is to use upstream style of DT binding. This patch includes following
changes.
* Add new helper functions to parse all DAI links from DT. All code
related to this is added in a new file.
* Remove older helper functions for parsing. Please note that, not all
functions can be removed since few machine drivers rely on them.
* Common params structure is used for all codec-to-codec links. In machine
driver hw_params() callback all DAI link params are updated. Hence it
is not necessary to maintain separate structures.
* By default card->dapm.idle_bias_off is set to true. This means, codec
suspend() won't be called during STANDBY. The flag is set to true for
Tegra210 as well, where earlier it was set to false. This further helps
to remove soc_data structure.
* Module specific checks are not needed to manage DAI links now.
Bug 200538260
Change-Id: I210b70c23a8878f5b1733dfa9d2010834ae4a85a
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2229358
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
-Avoided double compilation of machine driver as mobile
platforms >= t210 have common machine driver, through a
common config
-Removed SND_SOC_ASOC_MACHINE_ALT, SND_SOC_TEGRA_ALT_FORCE_CARD_REG
config as its not being used
Bug 200540133
Change-Id: I57271888581d6494e771be77a8fd2fe5b5adb015
Signed-off-by: Asha Talambedu <atalambedu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2233907
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
Reviewed-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
For SW reset and register status polling timeout code is used in multiple
drivers. Since the logic is similar, the same code is duplicated at many
places. This can be avoided by relying on the kernel macro which provides
similar functionality, where sleep between polling and timeout can be
explicitly provided. For example, ADMA driver is using a similar kernel
macro and this can be used for Tegra ASoC drivers as well.
Currently this patch updates timeout code for ADMAIF and I2S to start with.
This helps for upstream as well. Other drivers will be taken care in a
separate patch. In doing so following changes are also needed,
* Few functions are optimized to simplify the code during stream start or
stop. This basically combines RX and TX handling in a single function
and thus helps to avoid code duplication.
* For ADMAIF, macros are used wherever register access for RX and TX paths
are needed. Existing CH_REG() macro is updated to facilitate this. RX
and TX paths can use CH_RX_REG() and CH_TX_REG() respectively to get
proper register offset. Accordingly the access is updated in the driver.
Bug 200566596
Bug 200503387
Change-Id: I6d46518dba09a936ad84799943eba8976a261faa
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2241448
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
The I2S interfaces only support configurations where both the bit clock
and frame sync are master or are both slave. Therefore, remove support
for modes where the bit clock is master and frame sync is slave and
vice-versa from the 'I2Sx codec master mode' mixer controls.
Bug 2046053
Bug 2746555
Change-Id: I288a1a372fe200b5faf2eb0f3d7c481a34c1f545
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2230060
(cherry picked from commit 79a002b42a9c25cd26832c967f95f82e08935ca9)
Reviewed-on: https://git-master.nvidia.com/r/2237275
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Each I2S interface has a mixer control 'I2Sx codec master mode' to
set the master mode and 'I2Sx codec frame mode' to set the frame mode.
An issue with these mixer controls has been found where if the user
sets both of these, then whatever is set last will overwrite the other
resetting it back to its default value. For example, if 'I2Sx codec
master mode' configures the codec as the master, then set the 'I2Sx
codec frame mode' to say 'dsp-a', then setting the frame mode will
revert the master mode setting back to its default. Fix this by
ensuring the frame mode and master mode do not overwrite each other.
Bug 2046053
Bug 2746555
Change-Id: Ibd51a0462a4c02055075aee84808f7ddca0a9199
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2230059
(cherry picked from commit 70c45f196b76ce0d5e1e76153232cb3d35928262)
Reviewed-on: https://git-master.nvidia.com/r/2234917
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This is a preparatory patch for moving all DAI links to DT. With DT based
DAI links, we need to index through the DAI array. There are differences
between Tegra210 and Tegra186, which are listed below.
* OPE2 is removed in Tegra186
* AMX and ADX instances are increased to 4
* DSPK, ASRC and ARAD are added
* DMIC instances are increased to 4
* I2S instances are increased to 6
* ADMAIF channels are increased to 20 each for Tx and Rx
Above makes us to have separate headers in DT, containing macro defines,
for Tegra210 and Tegra186. This can be avoided by re-ordering the DAI array
to list common DAIs in the beginning and push the differences at the end.
As we can see adding instances can be easily handled by just listing out
the new DAIs at the end. But problem is when we remove an instance and it
requires some intelligence encoded in header files for optimization. In the
current case, OPE2 is being removed from Tegra186 onwards and hence this is
pushed to the end of Tegra210 DAI array.
Bug 200538260
Change-Id: I8f976ce08d6526357ab4578fa462ab53113c674d
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2220276
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
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This is a preparatory patch for moving all DAI links to DT. With the DT
based DAI link approach, we need to index through the DSPK DAI array to
reference a particular interface. This patch re-orders DAI array to be
consistent with other drivers, where we always first list CIF DAI and
then followed by DAP and Dummy (wherever applicable). DT can use macros
for these indices and can be common if the same order is followed for
all modules.
Bug 200538260
Bug 200520821
Change-Id: Ib3ced6078b73bdf542891e28d8081e3dd38e1ab5
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2220275
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
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This is a preparatory patch for moving all DAI links to DT. Currently
ADMAIF is registering both a component and a codec. Also it maintains
two DAI arrays, tegra210_admaif_codec_dais[]/tegra186_admaif_codec_dais[]
for codec and tegra_admaif_dais[] for component. With the DT based DAI
link approach, we need to index through the DAI array depending on the
"sound-dai" property that cpu/codec subnodes of the dai-link can expose.
The sound core is looking at *_codec_dais[] array while getting the DAI
name from index and does not consider component DAI array. Similarly this
is true for ADSP device as well.
This patch combines both DAI arrays and registers ADMAIF and ADSP as a
codec device alone. Later versions of kernel move from codec to component,
during that transition we can register ADMAIF device as component only.
Also, for ADSP, hard-coding of DAI ID is avoided which further helps to
index the required DAI from DT. The fe_reg/be_reg value calculation, which
depends on the DAI ID, is updated accordingly.
Bug 200538260
Change-Id: Ia65b6c52796d3da73850ce1de6bf332ac723b871
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2218928
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
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To allow loopbacks or dummy playback/capture from I/O modules to work
we have connected DAI links to spdif-dit dummy codecs, since generally
not all I/O modules have external codec connection. This helps to close
the DAPM path and audio path can be tested. The links or information
for these is exposed from DT.
In doing so, we require many instances of spdif-dit devices. For example,
for Tegra194 we have 6-I2S, 4-DMIC, 2-DSPK I/O modules. Hence we need
a maximum of 12 such spdif-dit codecs. This is populated in DT by exposing
entries for all these. Machine driver exposes routing paths for these with
random "prefix" naming.
Above can be easily avoided by doing following.
* Expose dummy DAIs for I/O modules and routing path in module drivers.
* Dummy speaker output and mic input DAPM widgets are added for path
completion.
* Routing path is added for connecting above.
* By default for all the instances of I/O, connect the modules to dummy
DAIs. This way we can make sure that the DAPM path is complete by
default.
Bug 200516191
Bug 200520821
Bug 200503387
Change-Id: I3bb34ae6e62f61b5b3e693c746cac6c312775912
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2177821
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ASRC config was enabled for all chip versions and this leads to
writing in the dai_links array for T210 platforms which is not
acceptable as there was no ASRC present on it. Fix this issue
by having extra runtime compatible check for t210.
Bug 200555164
Change-Id: I3714d4aed77b6cecc262db443219920f872c3e17
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2210518
(cherry picked from commit f9598cb45db19454a77fd78f680cc2b8db50cc7b)
Reviewed-on: https://git-master.nvidia.com/r/2210938
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
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When booting L4T, the I2S configuration for DAI format is defined by
properties in device-tree for the DAI link. However, mixer controls
for controlling the 'codec master mode' and 'codec frame mode' have
been added to the Tegra ASoC machine driver to that the DAI format can
also be configured from userspace. The problem is that if the
device-tree blob is updated and reflashed, any new settings in
device-tree for the DAI format although are applied initially during
boot, they are overwritten by the ALSA restore service that restores
the previous settings. The mixer controls should not override the DT
settings by default unless the user has explicitly set them via the
mixer controls.
Fix this by storing the state of the 'codec master mode' and 'codec
frame mode' mixer controls in a separate variable from the actual DAI
link format data.
Bug 2665590
Change-Id: I1405b1e8a3bb67e619fb43c3f9142e8a050e04c6
Signed-off-by: Jonathan Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2190010
(cherry picked from commit f5cf6f5b3532deec65b01b2a26a5373614a11bf6)
Reviewed-on: https://git-master.nvidia.com/r/2193535
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By default we are using plla_out0 as the clock source of I/O modules.
Similarly, these modules can use SYNC_CLK as the clock source. SYNC_CLK
is a MUX of I2Sx bit clocks and few other clocks. Hence it is possible
to use I2Sx bit clock as parent for I2Sy module or for any DMIC or DSPK
instance.
This patch adds SYNC_INPUT support for I2S bit clocks and set rate for
the same as per bit clock rate. If some I/O module wants to use this
bit clock as reference, then corresponding module can use assigned-clocks
DT bindings to setup proper clock relationships.
As an example, consider the case where I2S2 wants to use I2S1 bit clock as
reference. Clock relation looks like below(from clk_tree dump),
* i2s1_sync_input
|__
|
i2s2_sync_clk
|__
|
i2s2
DT binding to establish above relation is(Tegra194 taken as reference),
i2s@2901100 {
...
assigned-clocks = <&bpmp TEGRA194_CLK_I2S2>,
<&bpmp TEGRA194_CLK_SYNC_I2S2>;
assigned-clock-parents = <&bpmp TEGRA194_CLK_SYNC_I2S2>,
<&bpmp TEGRA194_CLK_I2S1_SYNC_INPUT>;
...
};
In default case, i2s2 clock relation is like below,
* pll_a
|__
|
plla_out0
|__
|
i2s2
And the corresponding DT binding is,
i2s@2901100 {
...
assigned-clocks = <&bpmp TEGRA194_CLK_I2S2>;
assigned-clock-parents = <&bpmp TEGRA194_CLK_PLLA_OUT0>;
...
};
Bug 200544085
Change-Id: I5d8d773616cecb4ccc43a5cf1f89845a68c861d4
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2189715
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Dipesh Gandhi <dipeshg@nvidia.com>
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
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MVC Mute Mixer ctrl setting is not reflecting correct
status as the mute ctrl register is not cached and therefore
getting reset to default in resume call that is being called
after reading the mixer ctrl.
To avoid this, MVC mute register is made non-volatile and
get_sync/put_sync is avoided for reading this cached register
Mute status reset in cache everytime after setting volume
for proper reflection of mute status in mixer controls. Note
that cached value will be synced to hardware on resume.
Bug 200532059
Change-Id: I9ee072d84c8103facdad22b2708113c4bcdda039
Signed-off-by: Asha Talambedu <atalambedu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2165774
(cherry picked from commit 85badb30954b503121f139a66eba4dc02eb90068)
Reviewed-on: https://git-master.nvidia.com/r/2185120
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on the fly curve type change needs hw soft reset or MVC disable
and enable programming sequence to be followed with re-programming
all the required register. Current driver code support is not
fully compliant with the IAS programming sequence. So to better
handling remove the on fly curve type support from the mvc driver.
Bug 200532059
Change-Id: I55a44134b07d1ddfebf103796d47930158ff770d
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2180060
(cherry picked from commit 608bcd2adf33b3f1daa5dad37441295351ea6e0c)
Reviewed-on: https://git-master.nvidia.com/r/2184303
GVS: Gerrit_Virtual_Submit
Reviewed-by: Asha Talambedu <atalambedu@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
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a) Both ADSP audio driver and OS are compiled with the same
config setting. Therefore, defined a config to enable disablement
of ADSP audio driver.
b) In addition, removed prompts for symbols related
to tegra-alt module drivers as the drivers as dependencies are not
properly defined which can lead to illegal confgurations that might
result in runtime failures
Bug 200536088
Change-Id: I2a7e31d604cca6f86f9db47dc0a7f91e96c6605a
Signed-off-by: Asha Talambedu <atalambedu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2159728
(cherry picked from commit 626e9724092aec5f0a39368cb51278a873cd7dfe)
Reviewed-on: https://git-master.nvidia.com/r/2176657
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
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Currently MCLK rate depends on following DT properties,
* 'mclk-fs' : This is a scaling factor depending on which MCLK rate
is calculated at runtime [rate = scale * sample_rate]. Different
codecs might expect different scale factors and hence DT property
is useful here.
* 'nvidia,mclk-rate' : This is used to provided fixed rate for MCLK.
This overrides scale property, when specified.
Since the requirement is either to have fixed or dynamic rate for MCLK,
this can be managed with single property like below.
* Use 'assigned-clocks' and 'assigned-clock-parents' to specify parent
clock for MCLK.
* Use preferred rate during initialization with 'assigned-clock-rates'
DT binding. This can be the required fixed rate as well.
* If dynamic scaling is required, then use 'mclk-fs' property.
Otherwise system uses fixed rate.
Since rt565x audio codecs expect scaling factor of 256, all platforms
which use such codecs must be populated with "mclk-fs" property. This
is taken care in other patches in the series.
Bug 200542485
Bug 200516191
Bug 200503387
Change-Id: I1fc31626929bab9d4707d2a1b74c8f1749412ea4
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2173560
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
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tegra_machine_driver_mobile.c declares function protoypes in the
beginning. This was done to avoid compiler build errors related
to unresolved symbols, when function is used before its definition.
With this patch, code is re-organised and these function prototypes
are no more needed.
Bug 200503387
Bug 200516191
Change-Id: I35519faf39059af5f0c9adf81712008ce61d8614
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2173559
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
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The Applied gain in dB never reflected in the output data with
the current driver code. There was few issues related to the
way we program the sequences. As a first step cleaning up the
driver to make sure the applied gain is proper in the output and
bitmatch works with multiple runs.
- Do MVC soft reset to clear the state in the hw_params before
processing the input data.
- Assign the init volume and target volume to the same value at
start of processing.
- Trigger the switch only after programming all the registers related
to Volume, duration and polynomial coefficients.
Bug 200532059
Change-Id: I2c77bd225284f31892ed8c2ff7c228dd19f8c63e
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2170333
(cherry picked from commit 6f56c3df3f2f6a55e33d9071cb5d05d0992a6b28)
Reviewed-on: https://git-master.nvidia.com/r/2173817
Reviewed-by: Automatic_Commit_Validation_User
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Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
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Currently we pass module clocks and related parents from DT bindings. The
driver gets these clock handles and does enable/disable() or sets rate
or parents whenever required. But passing the parent clock is not necessary
always, unless we want to change the rate dynamically.
For example consider the case of i2s device. Possible parents of i2s are,
* PLLA_OUT0, PLLA1_OUT1, SYNC_CLK, PLLP_OUT0, CLK_M
DT binding currently has entries for few of these clocks. This is not
needed, since we don't have requirement to set the parent dynamically.
Generally it is statically configured. Hence "assgigned-clocks" and
"assigned-clock-parents" DT binding can be used to specify the child and
parent relation.
In summary,
* devm_clk_get() functions are removed for parent and sync clocks. Only
for xbar, parent clock would be needed since we change the clock rate
dynamically depending on playback/capture rate. In most of the cases
only module clocks are sufficient and are retained.
* sync clocks are currently not used for L4T/Android. It could be later
required. Hence DT binding for it will be retained (mostly sync_input
would be needed). Required driver support will be added later.
* clk_set_parent() calls are removed, since DT clock binding takes care
of this.
* removed clk_ape and clk_apb2ape from xbar driver, since just enable
or disable of these is performed in the driver, which is not really
required. Because this is taken care in parent(ACONNECT) device node.
* Few clock names are updated as below in devm_clk_get()
* DSPK module clock --> "dspk"
* I2S module clock --> "i2s"
* XBAR parent clock --> "parent"
Bug 200503387
Change-Id: I29b77e32cf1f950d9ea3bb66d27b4a8482bf9926
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2159592
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
pcm_hw_params() and compr_set_params() functions set "is_playback" flag to
true for SNDRV_PCM_STREAM_PLAYBACK and SND_COMPRESS_PLAYBACK respectively.
The flag is then passed to tegra_machine_dai_init() function. However this
flag is not used by DAI init function and appears to be redundant.
Hence this patch removes is_playback argument from DAI init function and
cleans up pcm_hw_params() and compr_set_params() functions.
Bug 200516191
Bug 200503387
Change-Id: I759181a53fa2e599ca338b4004451183813a5fc5
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2172229
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commit b4bc1cf56020("ASoC: tegra-alt: Avoid reg access after shutdown")
avoided device register access after shutdown() has been called. This
otherwise resulted in occasional SError and resulted in crash. The reason
for this was runtime PM does not work after shutdown and it was seen on
vK4.4
Looks like the issue has been fixed from vK4.5 onwards, where PM domain
detach is avoided during shutdown. Following is the upstream commmit.
"platform: Do not detach from PM domains on shutdown"
Bug 200503387
Change-Id: I5f3d18f05e434d5a1ed5b597362a39ec9a9f010b
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2161809
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Highlights from current clock handling in machine driver(L4T/Android)
* Tegra210 and Tegra186/194 have different approaches to update clock
rates for pll_a, pll_a_out0, mclk and ahub.
-> Tegra210 uses static method, where base pll_a rate is hardcoded
in the driver.
-> Tegra186/194 use DT driven approach, where sound node passes rates
for above clocks. Two sets of rates are passed, one to support odd
sample rates and one for even.
* Some of the functions from tegra_asoc_utils_alt.c are unused
* clock names are not really generic.
This patch has following updates.
* Unify clock update approach. Use static array for base pll rates.
This also helps to get rid of following sound node DT properties.
"nvidia,num-rates"
"nvidia,clk-rates"
* Remove below unused functions.
tegra_alt_asoc_utils_lock_clk_rate()
tegra_alt_asoc_utils_register_ctls()
tegra_alt_asoc_utils_tristate_dap()
* clk_set_parent() functions are not needed. Instead the relationship
can be set from DT through "assigned-clocks" binding.
* update clock handle names to be more meaningful. However, clock names
that are parsed in devm_clk_get() are not changed because these names
are used in Automotive DT files under "sound_ref" node. Scope of
current patch is limited to L4T/Android drivers and DT files.
Bug 200503387
Bug 200516191
Change-Id: Ideaf150e6e200ffbba4dcbdec4c49f1127ea25db
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2164482
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
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tegra_machine_sfc_init() is used to initialize input and output rates
for SFC module. In fact, this is done for only SFC1 instance. Machine
driver does this setup by calling snd_soc_dai_set_sysclk() for input
and output. SFC driver has a callback function implemented to take
care of this.
Above is not really required. By default srate_in and srate_out have
value 0 and hence SFC would operate in bypass mode. Already mixer
controls are exposed from the driver to set SFC input and output sample
rates and the same should be used for the required rate conversions.
Thus this patch removes following functions,
* tegra_machine_sfc_init() from machine driver
* tegra210_sfc_set_dai_sysclk() from SFC driver
Bug 200503387
Change-Id: Iada1b4748413debd0eb7d7f9a951069bda15af22
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2165143
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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kzalloc() can be failed under low memory condition. In such a case, the
following memcpy() can cause a panic. Thus, the return value of
kzalloc() should be checked. If tegra_machine_get_dai_link_t18x() is
called, the return value should also be checked.
Bug 2647682
Change-Id: Ia200436a3b1877933932b9a086862f5507c8da54
Signed-off-by: Kwangwoo Lee <kwangwool@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2159959
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
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Machine driver has moved to newer versions of dai-link helpers. Unused
older functions now can be removed to simplify the code. Hence following
are removed.
* dai_link_setup()
* removed following callback functions from soc_data.
(*get_dai_link)()
(*get_codec_conf)()
(*append_dai_link)()
(*append_codec_conf)()
* Machine driver probe() is cleaned up
Bug 200516191
Bug 200503387
Change-Id: Ia4e636f97e94cec51cd3b67ce27f1bec16caab09
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2151461
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
With this patch tegra_machine_driver_mobile.c uses newly exposed helper
for dai link setup, add_dai_links(). The soc_data is populated with dai
link and codec conf members to take care of t21x and t18x platforms.
Older function, dai_link_setup(), is marked as __maybe_unused. This will
be removed in subsequent patches in the series.
Bug 200516191
Bug 200503387
Change-Id: If7ae36acc932cc8c146d59c03fd3ab6732c7ff35
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2151460
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
