- when there are multiple async events back to back from DCE with very
short time gap between 2 events(for example, in case of DP MST,
2 heads could be sending flip event notification back to back at
almost same time), there is a possibility of 2nd async event getting
processed very late when shared mailbox register is set to zero as part
of processing 1st async event and before processing of 2nd async event.
- current change fixes it by processing all pending IVC frames for IPC
channel when processing an async event.
- change few error logs to info logs as these are not actually errors.
Bug 3582863
Bug 3429668
Change-Id: I29b1813bed50c4583e37f02bf656802081ccf9d3
Signed-off-by: Santosh Reddy Galma <galmar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2698560
(cherry picked from commit dd1abfa6eaab6e4f599d8c97bdccc7cbb67e1341)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2700438
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Arun Swain <arswain@nvidia.com>
GVS: Gerrit_Virtual_Submit
Dereference after null check for pointers cl and handlep. Add a null
check before referencing cl and handlep.
Check return value of request_firmware for error.
Using uninitialized value event when calling dce_worker_thread_wait.
Add EVENT_ID_DCE_INVALID_EVENT and have a check before using the
value event.
CID 10127898
CID 10127999
CID 10127954
CID 10127811
Bug 3461002
Change-Id: If00ece28fd52e495b3a8d3eec7bdb4825d3c7892
Signed-off-by: Prateek Patel <prpatel@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2661588
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Mahesh Kumar <mahkumar@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
GVS: Gerrit_Virtual_Submit
There is race condition in driver when in_use variable
is accessed in both interrupt context and process context
to schedule a workitem in workqueue. When it is reproduced,
following error message is printed in kernel log.
dce: dce_client_schedule_event_work:359 Failed to schedule Async event
Queue Full!
- This change make sure to check for in_use variable in
interrupt context before scheduling a workitem in workqueue and also
uses atomic operations for usage of in_use variable.
- This also removes unreachable code in driver.
Bug 3454371
Change-Id: I68ce3cd17769ec837a895a4147ae042e2730ae58
Signed-off-by: David Yu <davyu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2636749
(cherry picked from commit b8935cf34edb52b9803dae3ace767b116b8adbef)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2637714
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Santosh Galma <galmar@nvidia.com>
Reviewed-by: Mahesh Kumar <mahkumar@nvidia.com>
Reviewed-by: Arun Swain <arswain@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Santosh Galma <galmar@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
currently dce_client_ipc_wait_rpc function waits with
"wait_event_interruptible". And if process is interrupted, it leads
to RPC failure as "dce_ipc_send_message_sync" will try to read RPC msg
when there is no msg to read yet.
This CL make change to restart/retry wait if condition variable is not
signaled by "dce_client_ipc_wakeup"
Bug 200771402
Change-Id: I8f1c7781bab8b6c20b05251cc2862ad2db22cc1f
Signed-off-by: Mahesh Kumar <mahkumar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2600849
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Santosh Galma <galmar@nvidia.com>
Reviewed-by: Arun Swain <arswain@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
The file dce-debug.c is only used when CONFIG_DEBUG_FS is enabled.
Compilation errors occur when CONFIG_DEBUG_FS is disabled.
Moreover the function "dce_init_debug" is defined in dce-debug.c.
Since compilation of this file only occurs when debugfs is enabled,
the declaration of the function should only be done when debugfs is
enabled.
This patch fixes the compilation errors by compiling the above
mentioned file only when debugfs is enabled. Also the declaration of
"dce_init_debug" is guarded by CONFIG_DEBUG_FS since it is only used
when debugfs is enabled.
Bug 200755555
Change-Id: I0077e0c7a722ed515b0bcdfdd82c94a371f5aae3
Signed-off-by: Sahil Mukund Patki <spatki@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2583640
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
For the BOOT_COMPLETE event the worker thread was immediately returning
in an error case without releasing the worker lock. This causes a
deadlock for the next worker event that has to be processed because the
worker lock can't be acquired. Fix this bug by not returning immediately
in the error case. Instead break out of the switch case block and
release the lock at the end of the function.
JIRA TDS-6380
Change-Id: I468098a37ac8f5f6f7459b84d590b989585075e3
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2552228
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Arun Swain <arswain@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Current code assumes no RPC message on Admin-channel post boot. So
- Admin RPC reply post-boot are not passed to the process issuing the
RPC instead expect dce_worker to handle the reply.
- dce_worker doesn't wait for > 1 RPC reply from DCE-Core post boot.
This patch Adds support to send RPC over Admin channel post boot and
also adds support to wake-up the process issued RPC and waiting for
reply.
JIRA TDS-6381
Change-Id: Ifa85f8686c4aee86eb8efc69f85e552ca6f605c5
Signed-off-by: Mahesh Kumar <mahkumar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t23x/+/2500788
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
In current code RPC ack events are handled by thread issuing RPC but
Async-IPC events are handled in the bottom-half with interrupt disabled.
This may delay delivery of RPC ack if async-IPC handling is hogging the
CPU. It can also lead to a race condition where the RPC caller takes
the lock, issues a RPC and waits for a reply. And in-between KMD receives
an Async IPC and wants to take the same lock.
As IPC code is running with interrupt disabled, RPC-reply interrupt will
not be notified and will result in a deadlock.
This patch creates a Workqueue to handle Async IPC events.
JIRA TDS-6381
Change-Id: If7d69ef50298ad9364e9e494a32cf483ecfb744e
Signed-off-by: Mahesh Kumar <mahkumar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t23x/+/2485764
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Santosh Galma <galmar@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: Arun Swain <arswain@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Re-organize IPC channel reset and mailbox interrupt handling code to
fix race condition where KMD was receiving new msg from DCE while
processing previous msg and clearing mailbox interrupt as part of it.
which was causing wait_for_ipc to get stuck.
JIRA TDS-6381
Change-Id: Ibd6ab1758d9b5b2e3709a03dadbc84f2585653a4
Signed-off-by: Mahesh Kumar <mahkumar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t23x/+/2460641
Reviewed-by: Santosh Galma <galmar@nvidia.com>
Reviewed-by: Arun Swain <arswain@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
For T23x, we have a separate R5 based cluster
named as Display Controller Engine(DCE) to run
our Display RM code. This driver will run on CPU
with the following functionality:
Via debugfs for test and bring-up purposes:
1. Reads the DCE firmware image into DRAM.
2. Sets up DCE AST to cover the DCE firmware image.
3. Sets up R5 reset vector to point to DCE firmware
entry point
4. Brings DCE out of reset
5. Dumps various regsiters for debug
In production env:
1. Manages interrupts to CPU from DCE
2. Uses bootstrap command interface to define Admin
IPC
3. Locks down bootstrap command interface
4. Uses Admin IPC to define message IPC
5. Uses Admin IPC to define message IPC payload area
6. Uses Admin IPC to set IPC channels
6. Uses Admin IPC to define crashdump area
(optional)
7. Provides IPC interfaces for any DCE Client running
on CCPLEX including Display RM.
8. Uses Admin IPC to set logging level (optional)
This patch puts a framework in place with the
following features :
1. Firmware Loading
2. AST Configuration
3. DCE Reset with EVP Programming
4. Logging Infra
5. Debugfs Support
6. Interrupt Handling
7. Mailbox Programming
8. IPC Programming
9. DCE Client Interface
10. Ftrace Support for debug purposes
Change-Id: Idd28cd9254706c7313f531fcadaa7024a5b344e7
Signed-off-by: Arun Swain <arswain@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t23x/+/2289865
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Mahesh Kumar <mahkumar@nvidia.com>
Reviewed-by: Santosh Galma <galmar@nvidia.com>
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Mahesh Kumar <mahkumar@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Guest VM has access to all of the profiler carveout right now so that
it can read full carveout and dump all the entries.
Right now address and size of Guest VM owned profiler carveout is parsed
from kernel command line. And the address of full profiler carveout
(containing logs of other VMs too) is calculated based on assumptions.
Current architecture is now getting reworked so that only a privileged
Guest VM can access full carveout and that too in read-only mode. Each
VM will have read-write access to its own carveout to read/write
profiler entries of that VM.
Update tegra_bootloader_debug_init.c to parse tegra_bl_prof_ro_start and
tegra_bl_prof_ro_size from kernel command line. These values indicate
address and size of the full read only carveout.
In tegra_bootloader_debuginit(), map the address of read only carveout
to tegra_bl_mapped_prof_ro_start and set is_privileged_vm to true.
Only privileged VM will be assigned this read only address by BL.
tegra_bl_mapped_prof_start continues to map to read-write carveout
owned by the VM.
Update profiler_show() so that it reads entries from the read-only
carveout if is_privileged_vm is set, otherwise it reads from read
write carveout.
Bug 3566403
Change-Id: I3c1e5d42d67f7724c6fa43b7e27f08ce2cd607b7
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2868921
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
When kernel command line debugfs=off is specified instead of
disabling CONFIG_DEBUG_FS in defconfig to disable Debug-FS,
debugfs functions like debugfs_create_dir will fail.
Use function debugfs_initialized() to check if debugfs
functionality is enabled before calling any debugfs functions.
This allows us to by-pass debugfs initialization if debugfs
is not enabled.
Bug 3896536
Change-Id: I18182f2e5f8a6b466286980907b2019961ff7e39
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2864651
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Upstream Linux commit 4c1e0a97351a ("firmware: tegra: bpmp: Use
iosys-map helpers") updated the Tegra IVC driver to use the
iosys-map helpers for Linux v6.2. This causes the Tegra capture-ivc
driver build to fail. Temporarily disable the building of this driver
while this build issue is fixed. Stub functions are added to permit
other drivers that use this driver to build.
Bug 3936429
Bug 3974855
Change-Id: I7a381fa90d92f11ee01d37f0ee7ab230162c5a62
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2861312
Reviewed-by: Rohit Khanna <rokhanna@nvidia.com>
Tested-by: Rohit Khanna <rokhanna@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
When kernel command line debugfs=off is specified instead of
disabling CONFIG_DEBUG_FS in defconfig to disable Debug-FS,
debugfs functions like debugfs_create_dir will fail.
Use function debugfs_initialized() to check if debugfs
functionality is enabled before calling any debugfs functions.
This allows us to by-pass debugfs initialization if debugfs
is not enabled.
Bug 3752450
Change-Id: I17390c2d9928638d940454c2ea1b3abf00ed4264
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2855128
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
For dma mappings done with dma_map_sg() calls, dma_sync_sg* calls are
required in order to make sure that caches for all the scattered
addresses are synced. Using dma_sync_single* call for syncing caches
can access address which is not mapped by dma_sync_sg() and cause kernel
exceptions.
Fix this by using correct cache sync calls for appropriate dma mapping
APIs.
Bug 3879036
Change-Id: I30afcf17806c505d94ff4eb7faefab5fbbf9e7b9
Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
Signed-off-by: Matti Ryttylainen <mryttylainen@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2839838
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Pekka Pessi <ppessi@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
EMC registers are currently accessed to get DRAM parameters.
As these are platform specific and static, DRAM parameters are added in
device-tree. In case of hypervisor environment, read DRAM properties
from device-tree instead of accessing EMC registers.
Also, MC and EMC register access by kernel is going to be blocked from
hypervisor. So, remove access to these registers.
Bug 3938091
Change-Id: I8a85bef7c34a919a48b3f0999f631f264540585a
Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/2848653
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
