gpu: nvgpu: move and rename gk20a_refch_from_inst_ptr

Rename gk20a_refch_from_inst_ptr to nvgpu_channel_refch_from_inst_ptr
and also move it to common/fifo/channel

JIRA NVGPU-1313

Change-Id: If99b63d602a9b707f5b711ef36f0096880ed3f35
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2084303
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Seema Khowala
2019-03-28 14:52:13 -07:00
committed by mobile promotions
parent 0f3117c166
commit 0a737a85ee
5 changed files with 35 additions and 34 deletions

View File

@@ -2661,3 +2661,33 @@ void gk20a_channel_semaphore_wakeup(struct gk20a *g, bool post_events)
}
}
}
/* return with a reference to the channel, caller must put it back */
struct channel_gk20a *nvgpu_channel_refch_from_inst_ptr(struct gk20a *g,
u64 inst_ptr)
{
struct fifo_gk20a *f = &g->fifo;
unsigned int ci;
if (unlikely(f->channel == NULL)) {
return NULL;
}
for (ci = 0; ci < f->num_channels; ci++) {
struct channel_gk20a *ch;
u64 ch_inst_ptr;
ch = gk20a_channel_from_id(g, ci);
/* only alive channels are searched */
if (ch == NULL) {
continue;
}
ch_inst_ptr = nvgpu_inst_block_addr(g, &ch->inst_block);
if (inst_ptr == ch_inst_ptr) {
return ch;
}
gk20a_channel_put(ch);
}
return NULL;
}

View File

@@ -270,35 +270,6 @@ int gk20a_init_fifo_setup_hw(struct gk20a *g)
return 0;
}
/* return with a reference to the channel, caller must put it back */
struct channel_gk20a *
gk20a_refch_from_inst_ptr(struct gk20a *g, u64 inst_ptr)
{
struct fifo_gk20a *f = &g->fifo;
unsigned int ci;
if (unlikely(f->channel == NULL)) {
return NULL;
}
for (ci = 0; ci < f->num_channels; ci++) {
struct channel_gk20a *ch;
u64 ch_inst_ptr;
ch = gk20a_channel_from_id(g, ci);
/* only alive channels are searched */
if (ch == NULL) {
continue;
}
ch_inst_ptr = nvgpu_inst_block_addr(g, &ch->inst_block);
if (inst_ptr == ch_inst_ptr) {
return ch;
}
gk20a_channel_put(ch);
}
return NULL;
}
bool gk20a_fifo_should_defer_engine_reset(struct gk20a *g, u32 engine_id,
u32 engine_subid, bool fake_fault)
{
@@ -522,7 +493,7 @@ static bool gk20a_fifo_handle_mmu_fault_locked(
}
} else {
/* Look up channel from the inst block pointer. */
ch = gk20a_refch_from_inst_ptr(g,
ch = nvgpu_channel_refch_from_inst_ptr(g,
mmfault_info.inst_ptr);
refch = ch;
if (refch != NULL) {

View File

@@ -317,8 +317,6 @@ const char *gk20a_decode_pbdma_chan_eng_ctx_status(u32 index);
int gk20a_fifo_tsg_unbind_channel_verify_status(struct channel_gk20a *ch);
struct channel_gk20a *gk20a_refch_from_inst_ptr(struct gk20a *g, u64 inst_ptr);
int gk20a_fifo_is_preempt_pending(struct gk20a *g, u32 id,
unsigned int id_type);
int __locked_fifo_preempt(struct gk20a *g, u32 id, bool is_tsg);

View File

@@ -818,7 +818,7 @@ static void gv11b_fb_copy_from_hw_fault_buf(struct gk20a *g,
inst_ptr = hi32_lo32_to_u64(addr_hi, addr_lo);
/* refch will be put back after fault is handled */
refch = gk20a_refch_from_inst_ptr(g, inst_ptr);
refch = nvgpu_channel_refch_from_inst_ptr(g, inst_ptr);
if (refch != NULL) {
chid = refch->chid;
}
@@ -1169,7 +1169,7 @@ static void gv11b_mm_copy_from_fault_snap_reg(struct gk20a *g,
inst_ptr = hi32_lo32_to_u64(addr_hi, addr_lo);
/* refch will be put back after fault is handled */
refch = gk20a_refch_from_inst_ptr(g, inst_ptr);
refch = nvgpu_channel_refch_from_inst_ptr(g, inst_ptr);
if (refch != NULL) {
chid = refch->chid;
}

View File

@@ -499,4 +499,6 @@ static inline u64 gk20a_channel_userd_gpu_va(struct channel_gk20a *c)
void nvgpu_channel_set_error_notifier(struct gk20a *g, struct channel_gk20a *ch,
u32 error_notifier);
int nvgpu_channel_set_syncpt(struct channel_gk20a *ch);
struct channel_gk20a *nvgpu_channel_refch_from_inst_ptr(struct gk20a *g,
u64 inst_ptr);
#endif