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gpu: nvgpu: preempt MISRA fix for Rule 1.1

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Add missing newline at the end of the file.

JIRA NVGPU-3383

Change-Id: I2430a8da322acfd7900bb604d9b3abd0133a2869
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2113119
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Seema Khowala
2019-05-06 11:51:47 -07:00
committed by mobile promotions
parent c9686156c1
commit 0acc79be87
3 changed files with 6 additions and 3 deletions
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3
drivers/gpu/nvgpu/hal/fifo/pbdma_gp10b.c
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@@ -82,4 +82,5 @@ u32 gp10b_pbdma_allowed_syncpoints_0_valid_f(void)
u32 gp10b_pbdma_allowed_syncpoints_0_index_v(u32 offset)
{
return pbdma_allowed_syncpoints_0_index_v(offset);
}
}

3
drivers/gpu/nvgpu/hal/fifo/pbdma_gv11b.c
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@@ -278,4 +278,5 @@ u32 gv11b_pbdma_set_channel_info_veid(u32 channel_id)
u32 gv11b_pbdma_config_userd_writeback_enable(void)
{
return pbdma_config_userd_writeback_enable_f();
}
}

3
drivers/gpu/nvgpu/hal/fifo/pbdma_tu104.h
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@@ -30,4 +30,5 @@ struct gk20a;
void tu104_pbdma_reset_header(struct gk20a *g, u32 pbdma_id);
u32 tu104_pbdma_read_data(struct gk20a *g, u32 pbdma_id);
#endif /* NVGPU_PBDMA_TU104_H */
#endif /* NVGPU_PBDMA_TU104_H */