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gpu: nvgpu: set CE prod values

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Add g->ops.ce.init_prod_values() hal for gv11b and tu104 to initialize
PROD values of CE unit

Bug 2526212

Change-Id: I8e516b292622e09c537feb7830392648116baa7c
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2150874
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Deepak Nibade
2019-07-10 15:22:21 +05:30
committed by mobile promotions
parent bf939e3ea6
commit 0e6a305c6a
8 changed files with 29 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
drivers/gpu/nvgpu/common/ce/ce.c
View File

@@ -444,6 +444,11 @@ int nvgpu_ce_init_support(struct gk20a *g)
ce_app->app_state = NVGPU_CE_ACTIVE;
nvgpu_mutex_release(&ce_app->app_mutex);
if (g->ops.ce.init_prod_values != NULL) {
g->ops.ce.init_prod_values(g);
}
nvgpu_log(g, gpu_dbg_cde_ctx, "ce: init finished");
return 0;

1
drivers/gpu/nvgpu/hal/ce/ce_gv11b.h
View File

@@ -30,5 +30,6 @@ struct gk20a;
void gv11b_ce_mthd_buffer_fault_in_bar2_fault(struct gk20a *g);
u32 gv11b_ce_get_num_pce(struct gk20a *g);
void gv11b_ce_stall_isr(struct gk20a *g, u32 inst_id, u32 pri_base);
void gv11b_ce_init_prod_values(struct gk20a *g);
#endif /* NVGPU_CE_GV11B_H */

14
drivers/gpu/nvgpu/hal/ce/ce_gv11b_fusa.c
View File

@@ -104,3 +104,17 @@ void gv11b_ce_mthd_buffer_fault_in_bar2_fault(struct gk20a *g)
}
}
}
void gv11b_ce_init_prod_values(struct gk20a *g)
{
u32 reg_val;
u32 num_lce, lce;
num_lce = g->ops.top.get_num_lce(g);
for (lce = 0U; lce < num_lce; lce++) {
reg_val = nvgpu_readl(g, ce_lce_opt_r(lce));
reg_val |= ce_lce_opt_force_barriers_npl__prod_f();
nvgpu_writel(g, ce_lce_opt_r(lce), reg_val);
}
}

1
drivers/gpu/nvgpu/hal/init/hal_gv11b.c
View File

@@ -222,6 +222,7 @@ static const struct gpu_ops gv11b_ops = {
.get_num_pce = gv11b_ce_get_num_pce,
.mthd_buffer_fault_in_bar2_fault =
gv11b_ce_mthd_buffer_fault_in_bar2_fault,
.init_prod_values = gv11b_ce_init_prod_values,
},
.gr = {
#ifdef CONFIG_NVGPU_DEBUGGER

1
drivers/gpu/nvgpu/hal/init/hal_tu104.c
View File

@@ -265,6 +265,7 @@ static const struct gpu_ops tu104_ops = {
.get_num_pce = gv11b_ce_get_num_pce,
.mthd_buffer_fault_in_bar2_fault =
gv11b_ce_mthd_buffer_fault_in_bar2_fault,
.init_prod_values = gv11b_ce_init_prod_values,
},
.gr = {
#ifdef CONFIG_NVGPU_DEBUGGER

1
drivers/gpu/nvgpu/include/nvgpu/gk20a.h
View File

@@ -285,6 +285,7 @@ struct gpu_ops {
u32 (*isr_nonstall)(struct gk20a *g, u32 inst_id, u32 pri_base);
u32 (*get_num_pce)(struct gk20a *g);
void (*mthd_buffer_fault_in_bar2_fault)(struct gk20a *g);
void (*init_prod_values)(struct gk20a *g);
} ce;
struct {
#ifdef CONFIG_NVGPU_DEBUGGER

3
drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ce_gv11b.h
View File

@@ -72,4 +72,7 @@
#define ce_intr_status_mthd_buffer_fault_pending_f() (0x10U)
#define ce_intr_status_mthd_buffer_fault_reset_f() (0x10U)
#define ce_pce_map_r() (0x00104028U)
#define ce_lce_opt_r(i)\
(nvgpu_safe_add_u32(0x00104414U, nvgpu_safe_mult_u32((i), 128U)))
#define ce_lce_opt_force_barriers_npl__prod_f() (0x8U)
#endif

3
drivers/gpu/nvgpu/include/nvgpu/hw/tu104/hw_ce_tu104.h
View File

@@ -72,4 +72,7 @@
#define ce_intr_status_mthd_buffer_fault_pending_f() (0x10U)
#define ce_intr_status_mthd_buffer_fault_reset_f() (0x10U)
#define ce_pce_map_r() (0x00104028U)
#define ce_lce_opt_r(i)\
(nvgpu_safe_add_u32(0x00104414U, nvgpu_safe_mult_u32((i), 128U)))
#define ce_lce_opt_force_barriers_npl__prod_f() (0x8U)
#endif