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gpu: nvgpu: use FALCON_MAILBOX_0 macro

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One of the mailbox 0 read and write hardcoded mailbox number.
Use the macro instead.

JIRA NVGPU-1459

Change-Id: Ic350c91c2100d09187c69724945dae920c9712c5
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1961635
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Sagar Kamble
2018-11-29 14:24:37 +05:30
committed by mobile promotions
parent d13059701f
commit 0f952a1a85
1 changed files with 3 additions and 2 deletions
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5
drivers/gpu/nvgpu/common/fb/fb_gv100.c
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@@ -210,7 +210,8 @@ int gv100_fb_memory_unlock(struct gk20a *g)
/* Write non-zero value to mailbox register which is updated by
* mem_unlock bin to denote its return status.
*/
nvgpu_falcon_mailbox_write(&g->nvdec_flcn, 0, 0xdeadbeef);
nvgpu_falcon_mailbox_write(&g->nvdec_flcn,
FALCON_MAILBOX_0, 0xdeadbeef);
/* set BOOTVEC to start of non-secure code */
nvgpu_falcon_bootstrap(&g->nvdec_flcn, 0);
@@ -219,7 +220,7 @@ int gv100_fb_memory_unlock(struct gk20a *g)
nvgpu_falcon_wait_for_halt(&g->nvdec_flcn, MEM_UNLOCK_TIMEOUT);
/* check mem unlock status */
val = nvgpu_falcon_mailbox_read(&g->nvdec_flcn, 0);
val = nvgpu_falcon_mailbox_read(&g->nvdec_flcn, FALCON_MAILBOX_0);
if (val != 0U) {
nvgpu_err(g, "memory unlock failed, err %x", val);
nvgpu_falcon_dump_stats(&g->nvdec_flcn);