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git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-22 17:36:20 +03:00
gpu: nvgpu: t18x, gp10b framework
This change adds gp10b to the nvgpu build as well as enabling CMA for buffer allocation. Change-Id: Id3d45ad6ffdab14120395952e68b285dd7364c76 Signed-off-by: Ken Adams <kadams@nvidia.com> Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/553324 GVS: Gerrit_Virtual_Submit
This commit is contained in:
committed by
Deepak Nibade
parent
07b7a534fa
commit
16c511220e
10
drivers/gpu/nvgpu/Makefile
Normal file
10
drivers/gpu/nvgpu/Makefile
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@@ -0,0 +1,10 @@
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GCOV_PROFILE := y
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ccflags-$(CONFIG_GK20A) += -I$(srctree)/../kernel/drivers/gpu/nvgpu
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ccflags-$(CONFIG_GK20A) += -I$(srctree)/../kernel/include/linux
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ccflags-$(CONFIG_GK20A) += -I$(srctree)/../kernel-t18x/include
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ccflags-$(CONFIG_GK20A) += -Wno-multichar
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ccflags-$(CONFIG_GK20A) += -Werror
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obj-$(CONFIG_GK20A) += gp10b/
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13
drivers/gpu/nvgpu/gp10b/Makefile
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13
drivers/gpu/nvgpu/gp10b/Makefile
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@@ -0,0 +1,13 @@
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GCOV_PROFILE := y
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ccflags-$(CONFIG_GK20A) += -I$(srctree)/../kernel/drivers/gpu/nvgpu
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ccflags-$(CONFIG_GK20A) += -I$(srctree)/../kernel/include
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ccflags-$(CONFIG_GK20A) += -I$(srctree)/../kernel-t18x/drivers/gpu/nvgpu
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ccflags-$(CONFIG_GK20A) += -I$(srctree)/../kernel-t18x/include
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ccflags-$(CONFIG_GK20A) += -I$(srctree)/../kernel-t18x/include/uapi
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ccflags-$(CONFIG_GK20A) += -Wno-multichar
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obj-$(CONFIG_GK20A) += \
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gr_gp10b.o \
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hal_gp10b.o
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54
drivers/gpu/nvgpu/gp10b/gr_gp10b.c
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54
drivers/gpu/nvgpu/gp10b/gr_gp10b.c
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@@ -0,0 +1,54 @@
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/*
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* GP10B GPU GR
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*
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* Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include "gk20a/gk20a.h" /* FERMI and MAXWELL classes defined here */
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#include "gk20a/gr_gk20a.h"
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#include "gm20b/gr_gm20b.h" /* for MAXWELL classes */
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#include "gp10b/gr_gp10b.h"
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bool gr_gp10b_is_valid_class(struct gk20a *g, u32 class_num)
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{
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bool valid = false;
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switch (class_num) {
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case PASCAL_COMPUTE_A:
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case PASCAL_A:
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case PASCAL_DMA_COPY_A:
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valid = true;
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break;
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case MAXWELL_COMPUTE_B:
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case MAXWELL_B:
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case FERMI_TWOD_A:
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case KEPLER_DMA_COPY_A:
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case MAXWELL_DMA_COPY_A:
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valid = true;
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break;
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default:
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break;
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}
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gk20a_dbg_info("class=0x%x valid=%d", class_num, valid);
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return valid;
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}
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void gp10b_init_gr(struct gpu_ops *gops)
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{
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gm20b_init_gr(gops);
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gops->gr.is_valid_class = gr_gp10b_is_valid_class;
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}
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31
drivers/gpu/nvgpu/gp10b/gr_gp10b.h
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31
drivers/gpu/nvgpu/gp10b/gr_gp10b.h
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@@ -0,0 +1,31 @@
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/*
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* GM20B GPU GR
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*
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* Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef _NVGPU_GR_GP10B_H_
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#define _NVGPU_GR_GP10B_H_
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struct gk20a;
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enum {
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PASCAL_CHANNEL_GPFIFO_A = 0xC06F,
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PASCAL_A = 0xC097,
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PASCAL_COMPUTE_A = 0xC0C0,
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PASCAL_DMA_COPY_A = 0xC0B5,
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};
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void gp10b_init_gr(struct gpu_ops *ops);
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#endif
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28
drivers/gpu/nvgpu/gp10b/gr_ops_gp10b.h
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28
drivers/gpu/nvgpu/gp10b/gr_ops_gp10b.h
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@@ -0,0 +1,28 @@
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/*
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* GP10B GPU graphics ops
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*
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* Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef _GR_OPS_GP10B_H_
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#define _GR_OPS_GP10B_H_
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#include "gr_ops.h"
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#define __gr_gp10b_op(X) gr_gp10b_ ## X
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#define __set_gr_gp10b_op(X) . X = gr_gp10b_ ## X
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bool __gr_gp10b_op(is_valid_class)(struct gk20a *, u32);
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int __gr_gp10b_op(alloc_obj_ctx)(struct channel_gk20a *, struct nvgpu_alloc_obj_ctx_args *);
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#endif
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98
drivers/gpu/nvgpu/gp10b/hal_gp10b.c
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98
drivers/gpu/nvgpu/gp10b/hal_gp10b.c
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@@ -0,0 +1,98 @@
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/*
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* GP10B Tegra HAL interface
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*
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* Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <linux/types.h>
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#include <linux/printk.h>
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#include <linux/types.h>
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#include "gk20a/gk20a.h"
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#include "gp10b/gr_gp10b.h"
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#include "gm20b/ltc_gm20b.h"
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#include "gm20b/fb_gm20b.h"
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#include "gm20b/gm20b_gating_reglist.h"
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#include "gm20b/fifo_gm20b.h"
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#include "gm20b/gr_ctx_gm20b.h"
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#include "gm20b/mm_gm20b.h"
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#include "gm20b/pmu_gm20b.h"
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#include "gm20b/clk_gm20b.h"
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struct gpu_ops gp10b_ops = {
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.clock_gating = {
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.slcg_bus_load_gating_prod =
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gm20b_slcg_bus_load_gating_prod,
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.slcg_ce2_load_gating_prod =
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gm20b_slcg_ce2_load_gating_prod,
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.slcg_chiplet_load_gating_prod =
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gm20b_slcg_chiplet_load_gating_prod,
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.slcg_ctxsw_firmware_load_gating_prod =
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gm20b_slcg_ctxsw_firmware_load_gating_prod,
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.slcg_fb_load_gating_prod =
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gm20b_slcg_fb_load_gating_prod,
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.slcg_fifo_load_gating_prod =
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gm20b_slcg_fifo_load_gating_prod,
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.slcg_gr_load_gating_prod =
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gr_gm20b_slcg_gr_load_gating_prod,
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.slcg_ltc_load_gating_prod =
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ltc_gm20b_slcg_ltc_load_gating_prod,
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.slcg_perf_load_gating_prod =
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gm20b_slcg_perf_load_gating_prod,
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.slcg_priring_load_gating_prod =
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gm20b_slcg_priring_load_gating_prod,
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.slcg_pmu_load_gating_prod =
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gm20b_slcg_pmu_load_gating_prod,
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.slcg_therm_load_gating_prod =
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gm20b_slcg_therm_load_gating_prod,
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.slcg_xbar_load_gating_prod =
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gm20b_slcg_xbar_load_gating_prod,
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.blcg_bus_load_gating_prod =
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gm20b_blcg_bus_load_gating_prod,
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.blcg_ctxsw_firmware_load_gating_prod =
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gm20b_blcg_ctxsw_firmware_load_gating_prod,
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.blcg_fb_load_gating_prod =
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gm20b_blcg_fb_load_gating_prod,
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.blcg_fifo_load_gating_prod =
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gm20b_blcg_fifo_load_gating_prod,
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.blcg_gr_load_gating_prod =
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gm20b_blcg_gr_load_gating_prod,
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.blcg_ltc_load_gating_prod =
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gm20b_blcg_ltc_load_gating_prod,
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.blcg_pwr_csb_load_gating_prod =
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gm20b_blcg_pwr_csb_load_gating_prod,
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.blcg_pmu_load_gating_prod =
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gm20b_blcg_pmu_load_gating_prod,
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.pg_gr_load_gating_prod =
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gr_gm20b_pg_gr_load_gating_prod,
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}
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};
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int gp10b_init_hal(struct gpu_ops *gops)
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{
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*gops = gp10b_ops;
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gm20b_init_ltc(gops);
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gp10b_init_gr(gops);
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gm20b_init_ltc(gops);
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gm20b_init_fb(gops);
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gm20b_init_fifo(gops);
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gm20b_init_gr_ctx(gops);
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gm20b_init_mm(gops);
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gm20b_init_pmu_ops(gops);
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gm20b_init_clk_ops(gops);
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gops->name = "gp10b";
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return 0;
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}
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21
drivers/gpu/nvgpu/gp10b/hal_gp10b.h
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21
drivers/gpu/nvgpu/gp10b/hal_gp10b.h
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@@ -0,0 +1,21 @@
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/*
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* GP10B Tegra HAL interface
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*
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* Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef _NVGPU_HAL_GP10B_H
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#define _NVGPU_HAL_GP10B_H
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struct gpu_ops;
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int gp10b_init_hal(struct gpu_ops *gops);
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#endif
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30
drivers/gpu/nvgpu/nvgpu_gpuid_t18x.h
Normal file
30
drivers/gpu/nvgpu/nvgpu_gpuid_t18x.h
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@@ -0,0 +1,30 @@
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/*
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* NVIDIA GPU ID functions, definitions.
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*
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* Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef _NVGPU_GPUID_T18X_H_
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#define _NVGPU_GPUID_T18X_H_
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#define NVGPU_GPUID_GP10B \
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GK20A_GPUID(NVGPU_GPU_ARCH_GP100, NVGPU_GPU_IMPL_GP10B)
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#define NVGPU_COMPAT_TEGRA_GP10B "nvidia,tegra186-gp10b"
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#define NVGPU_COMPAT_GENERIC_GP10B "nvidia,generic-gp10b"
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#define TEGRA_18x_GPUID NVGPU_GPUID_GP10B
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#define TEGRA_18x_GPUID_HAL gp10b_init_hal
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#define TEGRA_18x_GPU_COMPAT_TEGRA NVGPU_COMPAT_TEGRA_GP10B
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#define TEGRA_18x_GPU_COMPAT_GENERIC NVGPU_COMPAT_GENERIC_GP10B
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struct gpu_ops;
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extern int gp10b_init_hal(struct gpu_ops *);
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#endif
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32
include/uapi/linux/nvgpu-t18x.h
Normal file
32
include/uapi/linux/nvgpu-t18x.h
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@@ -0,0 +1,32 @@
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/*
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* NVGPU Public Interface Header
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*
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* Copyright (c) 2011-2014, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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/* This file is meant to extend nvgpu.h, not replace it
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* as such, be sure that nvgpu.h is actually the file performing the
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* inclusion, to the extent that's possible.
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*/
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#ifndef _UAPI__LINUX_NVGPU_IOCTL_H
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# error "This file is to be included within nvgpu.h only."
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#endif
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#ifndef _UAPI__LINUX_NVGPU_T18X_IOCTL_H_
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#define _UAPI__LINUX_NVGPU_T18X_IOCTL_H_
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#define NVGPU_GPU_ARCH_GP100 0x00000130
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#define NVGPU_GPU_IMPL_GP10B 0x0000000B
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#endif /* _UAPI__LINUX_NVGPU_T18X_IOCTL_H_ */
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