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gpu: nvgpu: unit: improve coverage for gm20b channel HAL

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Add unit test for the following HAL:
- gm20b_channel_force_ctx_reload

Jira NVGPU-4384

Change-Id: Icb802348349a790371e6d84efe449c309105c5e8
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2250014
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Thomas Fleury
2019-11-27 17:55:23 -05:00
committed by Alex Waterman
parent 770090630c
commit 1ab3f73230
4 changed files with 58 additions and 4 deletions
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4
drivers/gpu/nvgpu/hal/fifo/channel_gm20b_fusa.c
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@@ -61,8 +61,8 @@ void gm20b_channel_bind(struct nvgpu_channel *c)
void gm20b_channel_force_ctx_reload(struct nvgpu_channel *ch)
{
struct gk20a *g = ch->g;
u32 reg = gk20a_readl(g, ccsr_channel_r(ch->chid));
u32 reg = nvgpu_readl(g, ccsr_channel_r(ch->chid));
gk20a_writel(g, ccsr_channel_r(ch->chid),
nvgpu_writel(g, ccsr_channel_r(ch->chid),
reg | ccsr_channel_force_ctx_reload_true_f());
}

1
drivers/gpu/nvgpu/libnvgpu-drv_safe.export
View File

@@ -26,6 +26,7 @@ gk20a_runlist_wait_pending
gk20a_runlist_write_state
gk20a_vm_release_share
gm20b_channel_bind
gm20b_channel_force_ctx_reload
gm20b_fb_tlb_invalidate
gm20b_mm_get_big_page_sizes
gm20b_gr_falcon_get_fecs_ctx_state_store_major_rev_id

26
userspace/units/fifo/channel/gm20b/nvgpu-channel-gm20b.c
View File

@@ -89,10 +89,36 @@ done:
return ret;
}
int test_gm20b_channel_force_ctx_reload(struct unit_module *m,
struct gk20a *g, void *args)
{
bool privileged = false;
u32 runlist_id = NVGPU_INVALID_RUNLIST_ID;
struct nvgpu_channel *ch;
int ret = UNIT_FAIL;
ch = nvgpu_channel_open_new(g, runlist_id,
privileged, getpid(), getpid());
assert(ch);
nvgpu_writel(g, ccsr_channel_r(ch->chid), 0);
gm20b_channel_force_ctx_reload(ch);
assert((nvgpu_readl(g, ccsr_channel_r(ch->chid)) &
ccsr_channel_force_ctx_reload_true_f()) != 0);
ret = UNIT_SUCCESS;
done:
if (ch) {
nvgpu_channel_close(ch);
}
return ret;
}
struct unit_module_test nvgpu_channel_gm20b_tests[] = {
UNIT_TEST(init_support, test_fifo_init_support, NULL, 0),
UNIT_TEST(bind, test_gm20b_channel_bind, NULL, 0),
UNIT_TEST(force_ctx_reload, test_gm20b_channel_force_ctx_reload, NULL, 0),
UNIT_TEST(remove_support, test_fifo_remove_support, NULL, 0),
};

31
userspace/units/fifo/channel/gm20b/nvgpu-channel-gm20b.h
View File

@@ -36,16 +36,18 @@ struct gk20a;
/**
* Test specification for: test_gm20b_channel_bind
*
* Description: Branch coverage for gm20b_channel_bind
* Description: Bind channel to HW
*
* Test Type: Feature based
*
* Targets: gm20b_channel_bind
*
* Input: test_fifo_init_support() run for this GPU
*
* Steps:
* - Create channel.
* - Write 0 to ccsr_channel_inst_r and ccsr_channel_r.
* - Call g->ops.channel.bind.
* - Call gm20b_channel_bind and.
* - Check that ccsr_channel_inst_r and ccsr_channel_r have
* been programmed.
* - Check that ch->bound is set.
@@ -55,6 +57,31 @@ struct gk20a;
int test_gm20b_channel_bind(struct unit_module *m,
struct gk20a *g, void *args);
/**
* Test specification for: test_gm20b_channel_force_ctx_reload
*
* Description: Force reload of channel context
*
* Test Type: Feature based
*
* Targets: gm20b_channel_force_ctx_reload
*
* Input: test_fifo_init_support() run for this GPU
*
* Steps:
* - Create channel.
* - Write 0 to ccsr_channel_r.
* - Call gm20b_channel_force_ctx_reload
* - Check that ccsr_channel_force_ctx_reload_true_f is set in ccsr_channel_r.
*
* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
*/
int test_gm20b_channel_force_ctx_reload(struct unit_module *m,
struct gk20a *g, void *args);
/**
* @}
*/