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gpu: nvgpu: fix MISRA violation common.gr.gr

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Rule 10.6 forbids assignment of an 32-bit expression to a 64-bit target.
This patch fixes MISRA 10.6 violations in common/gr/gr.c.

Jira NVGPU-3808

Change-Id: I2fbe4a6fc7550acda1a8dbf545e35eff1e1fde39
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2152629
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Vedashree Vidwans
2019-07-12 15:21:51 -07:00
committed by mobile promotions
parent e303b7e604
commit 39eef61416
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/nvgpu/common/gr/gr.c
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@@ -320,11 +320,11 @@ static int gr_init_access_map(struct gk20a *g, struct nvgpu_gr *gr)
map_shift = map_bit & 0x7U; /* i.e. 0-7 */
nvgpu_log_info(g, "access map addr:0x%x byte:0x%x bit:%d",
whitelist[w], map_byte, map_shift);
x = nvgpu_mem_rd32(g, mem, map_byte / (u32)sizeof(u32));
x = nvgpu_mem_rd32(g, mem, (u64)map_byte / (u64)sizeof(u32));
x |= BIT32(
(map_byte % (u32)sizeof(u32) * BITS_PER_BYTE_U32)
+ map_shift);
nvgpu_mem_wr32(g, mem, map_byte / (u32)sizeof(u32), x);
nvgpu_mem_wr32(g, mem, (u64)map_byte / (u64)sizeof(u32), x);
}
return 0;