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gpu: nvgpu: Fix MISRA 17.7 violations for PMU-FW unit
- Rule 17.7 states that the value returned by a function having non-void return type shall be used. - Fix this violation by proper error handling. JIRA NVGPU-3419 Change-Id: Ia66906747cc2a95ea7f1ce5da16e4251ff521e53 Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2121936 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: Sagar Kamble <skamble@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -56,6 +56,20 @@ exit:
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return err;
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}
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static void pmu_free_ns_ucode_blob(struct gk20a *g)
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{
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struct nvgpu_pmu *pmu = g->pmu;
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struct mm_gk20a *mm = &g->mm;
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struct vm_gk20a *vm = mm->pmu.vm;
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struct pmu_rtos_fw *rtos_fw = pmu->fw;
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nvgpu_log_fn(g, " ");
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if (nvgpu_mem_is_valid(&rtos_fw->ucode)) {
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nvgpu_dma_unmap_free(vm, &rtos_fw->ucode);
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}
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}
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int nvgpu_pmu_ns_fw_bootstrap(struct gk20a *g, struct nvgpu_pmu *pmu)
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{
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int err;
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@@ -70,7 +84,14 @@ int nvgpu_pmu_ns_fw_bootstrap(struct gk20a *g, struct nvgpu_pmu *pmu)
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/* Do non-secure PMU boot */
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nvgpu_mutex_acquire(&pmu->isr_mutex);
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nvgpu_falcon_reset(pmu->flcn);
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err = nvgpu_falcon_reset(pmu->flcn);
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if (err != 0) {
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nvgpu_err(g, "falcon reset failed");
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/* free the ns ucode blob */
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pmu_free_ns_ucode_blob(g);
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nvgpu_mutex_release(&pmu->isr_mutex);
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return err;
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}
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pmu->isr_enabled = true;
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nvgpu_mutex_release(&pmu->isr_mutex);
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