nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-24 10:34:43 +03:00
Code Issues Packages Projects Releases Wiki Activity

Revert "gpu: nvgpu: clear pbdma intr after recovery"

Browse Source 
This reverts commit 6554696006.

Change-Id: Ifd86f0d75e309c3593b69cdd042e6cb49a1c53bc
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2125117
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
This commit is contained in:
Alex Waterman
2019-05-24 13:05:37 -07:00
parent bfd7b0e386
commit 3f05901828
8 changed files with 2 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/gpu/nvgpu/hal/fifo/fifo_intr_gk20a.c
View File

@@ -223,7 +223,6 @@ u32 gk20a_fifo_pbdma_isr(struct gk20a *g)
nvgpu_rc_pbdma_fault(g, f, pbdma_id,
error_notifier);
}
g->ops.pbdma.intr_clear_all(g, pbdma_id);
}
}
return fifo_intr_0_pbdma_intr_pending_f();

2
drivers/gpu/nvgpu/hal/fifo/pbdma_gm20b.c
View File

@@ -452,6 +452,7 @@ bool gm20b_pbdma_handle_intr(struct gk20a *g, u32 pbdma_id,
&intr_error_notifier)) {
recover = true;
}
nvgpu_writel(g, pbdma_intr_0_r(pbdma_id), pbdma_intr_0);
}
if (pbdma_intr_1 != 0U) {
@@ -463,6 +464,7 @@ bool gm20b_pbdma_handle_intr(struct gk20a *g, u32 pbdma_id,
&intr_error_notifier)) {
recover = true;
}
nvgpu_writel(g, pbdma_intr_1_r(pbdma_id), pbdma_intr_1);
}
if (error_notifier != NULL) {

1
drivers/gpu/nvgpu/hal/init/hal_gm20b.c
View File

@@ -603,7 +603,6 @@ static const struct gpu_ops gm20b_ops = {
.cleanup_sw = nvgpu_pbdma_cleanup_sw,
.setup_hw = gm20b_pbdma_setup_hw,
.intr_enable = gm20b_pbdma_intr_enable,
.intr_clear_all = gm20b_pbdma_clear_all_intr,
.acquire_val = gm20b_pbdma_acquire_val,
.get_signature = gm20b_pbdma_get_signature,
.dump_status = gm20b_pbdma_dump_status,

1
drivers/gpu/nvgpu/hal/init/hal_gp10b.c
View File

@@ -667,7 +667,6 @@ static const struct gpu_ops gp10b_ops = {
.cleanup_sw = nvgpu_pbdma_cleanup_sw,
.setup_hw = gm20b_pbdma_setup_hw,
.intr_enable = gm20b_pbdma_intr_enable,
.intr_clear_all = gm20b_pbdma_clear_all_intr,
.acquire_val = gm20b_pbdma_acquire_val,
.get_signature = gp10b_pbdma_get_signature,
.dump_status = gm20b_pbdma_dump_status,

1
drivers/gpu/nvgpu/hal/init/hal_gv100.c
View File

@@ -817,7 +817,6 @@ static const struct gpu_ops gv100_ops = {
.cleanup_sw = nvgpu_pbdma_cleanup_sw,
.setup_hw = gm20b_pbdma_setup_hw,
.intr_enable = gv11b_pbdma_intr_enable,
.intr_clear_all = gm20b_pbdma_clear_all_intr,
.acquire_val = gm20b_pbdma_acquire_val,
.get_signature = gp10b_pbdma_get_signature,
.dump_status = gm20b_pbdma_dump_status,

1
drivers/gpu/nvgpu/hal/init/hal_gv11b.c
View File

@@ -785,7 +785,6 @@ static const struct gpu_ops gv11b_ops = {
.cleanup_sw = nvgpu_pbdma_cleanup_sw,
.setup_hw = gv11b_pbdma_setup_hw,
.intr_enable = gv11b_pbdma_intr_enable,
.intr_clear_all = gm20b_pbdma_clear_all_intr,
.acquire_val = gm20b_pbdma_acquire_val,
.get_signature = gp10b_pbdma_get_signature,
.dump_status = gm20b_pbdma_dump_status,

1
drivers/gpu/nvgpu/hal/init/hal_tu104.c
View File

@@ -855,7 +855,6 @@ static const struct gpu_ops tu104_ops = {
.cleanup_sw = nvgpu_pbdma_cleanup_sw,
.setup_hw = gv11b_pbdma_setup_hw,
.intr_enable = gv11b_pbdma_intr_enable,
.intr_clear_all = gm20b_pbdma_clear_all_intr,
.acquire_val = gm20b_pbdma_acquire_val,
.get_signature = gp10b_pbdma_get_signature,
.dump_status = gm20b_pbdma_dump_status,

1
drivers/gpu/nvgpu/include/nvgpu/gk20a.h
View File

@@ -1102,7 +1102,6 @@ struct gpu_ops {
void (*cleanup_sw)(struct gk20a *g);
void (*setup_hw)(struct gk20a *g);
void (*intr_enable)(struct gk20a *g, bool enable);
void (*intr_clear_all)(struct gk20a *g, u32 pbdma_id);
bool (*handle_intr_0)(struct gk20a *g,
u32 pbdma_id, u32 pbdma_intr_0,
u32 *error_notifier);