gpu: nvgpu: add bitmask to fault injection

Some APIs(especially that created thread) are hard to test with current
fault injection logic. Introduce bitmask so that the fault injection can
be enabled at any arbitrary iteration.

Bug 200580790

Change-Id: I990ba442d2c1dbd9f44d565bd2ce0196f8653257
Signed-off-by: shashank singh <shashsingh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2268729
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Tested-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
shashank singh
2019-12-24 17:37:04 +05:30
committed by Alex Waterman
parent 4db949d5b5
commit 3f65316312
2 changed files with 53 additions and 1 deletions

View File

@@ -29,6 +29,7 @@
struct nvgpu_posix_fault_inj {
bool enabled;
unsigned int counter;
unsigned long bitmask;
};
/**
@@ -180,4 +181,30 @@ bool nvgpu_posix_is_fault_injection_cntr_set(struct nvgpu_posix_fault_inj *fi);
*/
bool nvgpu_posix_fault_injection_handle_call(struct nvgpu_posix_fault_inj *fi);
/**
* nvgpu_posix_set_fault_injection - Set fault injection bitmask for the given
* object @fi with @bitmask and @number of
* times fi is needed. For example a bitmask
* 0x12 and number as 6 will inject fault at
* 2nd and 5th iteration. Currently it only
* supports upto 64 counter with bitmask. In
* future an array of bitmask can be passed
* and only implementation of this function
* need to be changed.
*
* @fi - pointer to the fault_inj object.
* @bitmask - Call Interation to be faulted in bitmask format.
* @number - Fault injection supported upto <number> count.
*/
void nvgpu_posix_set_fault_injection_bitmask(struct nvgpu_posix_fault_inj *fi,
unsigned long *bitmask, unsigned int number);
/**
* nvgpu_posix_fault_injection_handle_call - Reset the bitmask fi.
*
* @fi - pointer to the fault_inj object
*
*/
void nvgpu_posix_reset_fault_injection_bitmask(struct nvgpu_posix_fault_inj *fi);
#endif /* NVGPU_POSIX_FAULT_INJECTION_H */

View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -59,6 +59,21 @@ bool nvgpu_posix_is_fault_injection_cntr_set(struct nvgpu_posix_fault_inj *fi)
return (fi->counter > 0U);
}
void nvgpu_posix_set_fault_injection_bitmask(struct nvgpu_posix_fault_inj *fi,
unsigned long *bitmask, unsigned int number)
{
/* TODO check for input validity */
fi->bitmask = *bitmask;
fi->counter = number;
}
void nvgpu_posix_reset_fault_injection_bitmask(struct nvgpu_posix_fault_inj *fi)
{
fi->bitmask = 0UL;
fi->counter = 0U;
}
/*
* Return status of fault injection.
* Decrement fault injection count for each call.
@@ -67,6 +82,16 @@ bool nvgpu_posix_fault_injection_handle_call(struct nvgpu_posix_fault_inj *fi)
{
bool current_state = fi->enabled;
if (fi->bitmask != 0UL && fi->counter > 0U &&
fi->counter <= sizeof(fi->bitmask) * 8) {
fi->counter--;
if ((1UL << fi->counter) & fi->bitmask) {
return true;
} else {
return false;
}
}
if (fi->counter > 0U) {
fi->counter--;
if (fi->counter == 0U) {